LPC18S50 datasheet(65/151 Pages) NXP

65 / 151 page

LPC18S50_S30_S10

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Product data sheet

Rev. 1 — 23 February 2015

65 of 151

NXP Semiconductors

LPC18S50/S30/S10

32-bit ARM Cortex-M3 microcontroller

7.10 Memory mapping

Fig 7.

LPC18S50/S30/S10 Memory mapping (overview)

reserved

peripheral bit band alias region

reserved

high-speed GPIO

reserved

0x0000 0000

0 GB

1 GB

4 GB

0x2001 0000

0x2200 0000

0x2400 0000

0x2800 0000

0x1000 0000

0x3000 0000

0x4000 0000

0x4001 2000

0x4004 0000

0x4005 0000

0x4010 0000

0x4400 0000

0x6000 0000

AHB peripherals

APB peripherals #0

APB peripherals #1

reserved

RTC domain peripherals

0x4006 0000

0x4008 0000

0x4009 0000

0x400A 0000

0x400B 0000

0x400C 0000

0x400D 0000

0x400E 0000

0x400F 0000

0x400F 1000

0x400F 2000

0x400F 4000

0x400F 8000

clocking/reset peripherals

APB peripherals #2

APB peripherals #3

0x2000 8000

16 kB AHB SRAM (LPC18S50/30)

16 kB AHB SRAM (LPC18S50/30/10)

0x2000 C000

16 kB AHB SRAM (LPC18S50/30)

16 kB AHB SRAM (LPC18S50/30/10)

reserved

0x4010 1000

0x4010 2000

0x4200 0000

reserved

local SRAM/

external static memory banks

0x2000 0000

0x2000 4000

128 MB dynamic external memory DYCS0

256 MB dynamic external memory DYCS1

256 MB dynamic external memory DYCS2

256 MB dynamic external memory DYCS3

0x7000 0000

0x8000 0000

0x8800 0000

0xE000 0000

256 MB shadow area

LPC18S50/30/10

0x1000 0000

0x1001 8000

0x1008 0000

0x1008 A000

0x1040 0000

0x1041 0000

0x1C00 0000

0x1D00 0000

reserved

32 MB AHB SRAM bit banding

reserved

0xE010 0000

0xFFFF FFFF

reserved

SPIFI data

ARM private bus

reserved

0x1001 0000

32 kB local SRAM (LPC18S50/30)

64 kB local SRAM

(LPC18S50/30S/10)

32 kB + 8 kB local SRAM

(LPC18S50/30/10)

reserved

64 kB ROM

0x1E00 0000

0x1F00 0000

0x2000 0000

16 MB static external memory CS3

16 MB static external memory CS2

16 MB static external memory CS1

16 MB static external memory CS0

0x1400 0000

0x1800 0000

64 MB SPIFI data

aaa-014019

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