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LINR2 Datasheet(PDF) 104 Page - fujitsu semiconductor

Part # LINR2
Description  16-bit Proprietary Microcontroller
PDF  108 Pages
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Manufacturer  FUJITSU [fujitsu semiconductor]
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Logo FUJITSU - fujitsu semiconductor

LINR2 Datasheet(HTML) 104 Page - fujitsu semiconductor

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MB96320 Series
104
FME-MB96320 rev 7
■ REVISION HISTORY
Revision
Date
Modification
Prelim 1
2007-05-02
Creation
Prelim 2
2007-05-25
Electrical characteristics updates
Prelim 3
2007-11-23
Cover page: package description removed.
Modification of the block diagram.
Add A pin function group in pin function description.
Electrical characteristics update.
Add chapter on LVD and example characteristics.
In ordering information: typo correction. Persistent instead of persistant.
Memory map relaid out.
Prelim 4
2007-12-20
Update of the block diagram: external bus address lines, clock output
function pins, AVRL removed from ADC block, relayout.
RAMSIZE in RAMSTART table is corrected to 12kB as in described in the
product lineup.
IO map table updated
Ordering information show now PMC packages not PQC. It displays also
the redesigned release.
IO map regenerated
Memory map and Flash configuration reworked
Few typos corrected across the document.
Flash bank renaming.
IO circuit drawings modified.
Prelim 5
2008-02-04
• Reload Timer RLT 6 for PPGs added
• Block diagram corrected: RLT6 added, OUT10->OUT10_R, TX0/RX0
->RX2/RX2,
• Pin assignment: TX3 deleted
• Pin function description corrected with all existing pin types
• I/O circuit type diagrams corrected
• Memory map cleaned up
• "Flash sector configuration" replaced by corrected "User ROM Memory
map for Flash devices"
• Parallel Flash programming spec removed
• IO map table regenerated:
- Port register: Naming style corrected
- Memory control registers renamed (Main -> A)
- addresses after 000BFFh removed
• Handling devices: AD converter items added
• Absolute maximum ratings: Pd and Ta specified more precisely
• Run and Sleep mode currents: more conditions added (1WS settings)
• Run mode current spec in 48/24MHz mode corrected
• Maximum CLKS1 frequency corrected at 1.8V
• External bus timings: missing conditions added and readability improved
• Ordering information updated
• Typos and formatting corrected



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