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LINR2 Datasheet(PDF) 105 Page - fujitsu semiconductor |
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LINR2 Datasheet(HTML) 105 Page - fujitsu semiconductor |
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105 / 108 page ![]() MB96320 Series FME-MB96320 rev 7 105 6 2009-01-09 • Format adjusted to official Fujitsu Microelectronics datasheet standard (mainly style changes and official notes and disclaimer added) • Numbering of Electrical Characteristics subchapters automated • Devices added (MB96F326A) • I/O map: Added node about reserved registers • Serial programming interface: Note about handshaking pins improved • specified AD converter channel offset to 4LSB • package code of MB96V300 corrected in ordering information • Added voltage condition to pull-up resistance spec • Ordering information: column “Flash/ROM” added, column “Remarks” re- moved • Official package dimension drawing with additional notes added • Empty pages removed • Handling devices: Notes added about Serial communication and about using ceramic resonators. • Feature list and AC Characteristics: 16MHz maximum frequency is valid for crystal oscillators. For resonators, maximum frequency depends on Q- factor • AC characteristics: PLL phase skew spec added, CLKVCO min=64MHz • VOL3 spec improved: spec valid for 3mA load for full Vcc range • C-Pin cap spec updated: 4.7 µF-10µF capacitor with tolerance permitted • “Preliminary” watermark removed 7 2010-06-22 • AD converter IAIN spec improved: 1uA valid up to 105deg, 1.2uA above 105deg. Changed Unit of Vot anf Vfst from LSB to V. • Note added that PLL phase jitter spec does not include jitter coming from Main clock • Removed PHDR register from IO map • Note added in DC characteristics how to select driving strength of ports • I2C AC spec updated: tof, Cb and tSP spec added, wrong footnotes and Condition removed • I/O Circuit type: Note added for type “N” (slew rate control according to I2C spec) • Updated Power Supply current spec in Run/Sleep/Timer/Stop modes (new spec items in PLL Run/Sleep mode, small adjustment of most other values) • Example characteristics updated, new figures added showing dependency of PLL Run mode current on frequency • Package dimension: Added the following sentence under the figure: “Please confirm the latest Package dimension by following URL. http://edevice.fujitsu.com/package/en-search/” • AD converter: Impact of input pin capacitance and external capacitance added to formula for calculation of the sampling time • Added specification of RC clock stabilization time • Feature description I2C: ‘8-bit addressing’ corrected to ‘7-bit addressing’ • Feature description PPG: ‘Reload timer overflow as clock input’ corrected to ‘Reload timer underflow as clock input’ • Company name updated on the cover page: Fujitsu Microelectronics Lim- ited -> Fujitsu Semiconductor Limited Revision Date Modification |
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