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MFC2000 Datasheet(PDF) 317 Page - List of Unclassifed Manufacturers |
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MFC2000 Datasheet(HTML) 317 Page - List of Unclassifed Manufacturers |
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317 / 426 page ![]() Hardware Description MFC 2000 Multifunctional Peripheral Controller 2000 100723A Conexant 16-19 Address: Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Default: USBIRQ (R) $01FF85E9 Ep4 Interrupt Ep2 Interrupt Suspend status EP5 Write Ack EP5 Read Ack EP0 Write Ack EP0 Read Ack USB Reset Interrupt Rst. Value 00h Address: Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Default: USBIRQ (R) $01FF85E8 Suspend Interrupt DMA Interrupt EP5 Write Interrupt EP5 Read Interrupt EP5 Setup Interrupt EP0 Write Interrupt EP0 Read Interrupt EP0 Setup Interrupt Rst. Value 00h Bit 15: This bit indicates that an odd packet is received at endpoint 4. Bit 14: This bit indicates that an odd packet is received at endpoint 2. Bit 13: When it is “1”, it indicates that the device is in suspend mode. If the PC does a global wake up, this bit will be reset to “0”. The firmware can reset this bit to ”0” by performing a device remote wakeup (setting the resume bit to be “1” in USBClrIRQ register). Bit 12: This bit indicates that if the control write on endpoint 5 is successful. “1” – Ack. “0” – Nack. Bit 11: This bit indicates that if the control read on endpoint 5 is successful. “1” – Ack. “0” – Nack. Bit 10: This bit indicates that if the control write on endpoint 0 is successful. “1” – Ack. “0” – Nack. Bit 9: This bit indicates that if the control read on endpoint 0 is successful. “1” – Ack. “0” – Nack. Bit 8: This bit indicates that a USB reset is detected on the bus. Bit 7: This bit indicates a suspend is detected on the bus. Bit 6: This bit indicates the DMA has reached its block size. Bit 5: This bit indicates that the endpoint 5 data buffer is full. Bit 4: This bit indicates that the data in endpoint 5 buffer has been send. Bit 3: This bit indicates that a set up packet has been send to endpoint 5 and the endpoint 5 setup data buffer is full. Bit 2: This bit indicates that the endpoint 0 data buffer is full. Bit 1: This bit indicates that the data in endpoint 0 buffer has been send. Bit 0: This bit indicates that a set up packet has been send to endpoint 5 and the endpoint 5 setup data buffer is full. |
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