MFC2000 datasheet(83/426 Pages) ETC

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Hardware Description

MFC 2000 Multifunctional Peripheral Controller 2000

100723A

Conexant

4-53

4.4.2.10 Timer2 Register

Address:

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Default:

Timer2

0x01FF8031

Timer 2 Value MSB

Rst Value

00h

Read Value

00h

Address:

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default:

Timer1

0x01FF8030

Timer 2 Value LSB

Rst Value

00h

Read Value

00h

Bit 15 – 0:

This is the timer value for the timer2 interrupt. This value will be

loaded in a counter when the timer interrupt bit is enable. The value

loaded in this register is dependent on the SIUCLK frequency. This

interrupt period can be programmed up to 50 ms with a programmable

resolution (see Table 4-10). To write new timer value into the register,

the enable bit in the IRQ/FIQ Enable register has to be disabled first;

the new timer value is then written into the register and the enable bit

is then set to load the new timer value into the counter.

The resolution of the timer1 and timer2 is dependent on SIUCLK and can be calculated as follows:

TMRCLK = (SIUCLK/B)/8 = ICLK/8 (value of B is programmable)

Table 4-10. Programmable Resolution of Timer1 and Timer2

SIUCLK (MHz)

ICLK (MHz)

TMRCLK (MHz)

TMRCLK (uSec)

1.25

0.8

7.5

0.9375

1.067

37.5

9.375

1.171875

0.833

1.25

0.8

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