MFC2000 datasheet(19/426 Pages) ETC

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Multifunctional Peripheral Controller 2000

MFC2000

100723A

Conexant

2-1

2. MFC2000 Summary

2.1

MFC2000 Device Family

The MFC2000 contains an internal 32-bit RISC Processor with 64-MB address space, the Countach Imaging DSP

(Conexant’s DSP) subsystem including embedded data and program memory, and dedicated circuitry optimized

for color scanning, color faxing, color copying, color printing, and multifunctional control and monitoring. The

device family with relevant features is described in Table 2-1.

Table 2-1. MFC2000 Device Family

Device No.

Product Code

Data Modem

Function

Voice Codec/Speaker

Phone Functions

Smart DAA Support

CX0720X-11

BFH

Yes

CX0720X-12

BDH

Yes

CX0720X -13

BBH

Yes

CX0720X -14

B9H

Yes

CX0720X-15

B8H

2.2

MFC2000 System Block Diagram

The MFC2000 contains the ARM7TDMI RISC Processor (described separately in ARM7TDMI Manuals),

Countach Imaging DSP, Modem DSP, and specialized hardware needed for the Multifunctional machine control

and scanner and fax signal processing. The Countach Imaging DSP subsystem is on a separate data bus.

Therefore, the ARM system data bus can operate in parallel with the Countach Imaging DSP subsystem data bus

for most operations except the interaction time between two buses. The two-bus architecture is very important to

provide enough bandwidth for full color MFP products. Figure 2-1 shows the MFP2000’s two-bus architecture.

The ARM Bus System (ABS) has two masters

ARM CPU and DMA Controller. They provide accesses to all

specialized hardware functions including the Countach Imaging DSP subsystem as a peripheral on the ARM Bus

System. ABS has several sections. The System Interface Unit (SIU) is the control center. The ARM CPU and

Cache Controller are on the Internal System Bus (ISB). The Cache Memory is on the Internal Cache Bus (ICB).

The DMA Controller is on the DMA Bus (DAB). All internal peripherals are on the Internal Peripheral Bus (IPB).

The SmartDAA/IA Interface and P80 core are on the IPB of the ARM Bus System. The ARM7TDMI runs at a

clock rate 40 MHz, 37.5 MHz, or 30 MHz. All external peripherals are on the ARM External Bus (AEB). There is a

separate bus system for the Countach Imaging DSP subsystem called Countach Bus System (CBS). There are

three sections, the Video/Scan Interface, the ARM Bus Interface, and the countach subsystem interface. The

external SDRAM/DRAM is on the Countach External Bus (CEB).

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