AD7293 datasheet(39/78 Pages) AD

39 / 78 page

Data Sheet

AD7293

Rev. B | Page 39 of 78

Bit Number(s)

Bit Name

Description

TSENSE diode check

0: external check on (default)

1: external check off

Limit control

0: alert control over software limit feature (default)

1: alert and error amplifier control over software limit feature

ALERT0 clamp

0: no control (default)

1: ALERT0 routed internally to clamp bipolar DACs

Reserved

Table 36. Voltage Input (VINx) Range 0 Voltage Input Range Register (Register 0x15)

Bit Number(s)

Bit Name

Description1, 2

[D15:D4]

Reserved

VIN3 Range 0

Used in conjunction with VIN3 Range 1 bit (see Table 37) to specify the input range of VIN3

VIN2 Range 0

Used in conjunction with VIN2 Range 1 bit (see Table 37) to specify the input range of VIN2

VIN1 Range 0

Used in conjunction with VIN1 Range 1 bit (see Table 37) to specify the input range of VIN1

VIN0 Range 0

Used in conjunction with VIN0 Range 1 bit (see Table 37) to specify the input range of VIN0

REFADC = 1.25 V.

See Table 38 for bit descriptions.

Table 37. VINx Range 1 Voltage Input Range Register (Register 0x16)

Bit Number(s)

Bit Name

Description1, 2

[D15:D4]

Reserved

VIN3 Range 1

Used in conjunction with VIN3 Range 0 bit (see Table 36) to specify the input range of VIN3

VIN2 Range 1

Used in conjunction with VIN2 Range 0 bit (see Table 36) to specify the input range of VIN2

VIN1 Range 1

Used in conjunction with VIN1 Range 0 bit (see Table 36) to specify the input range of VIN1

VIN0 Range 1

Used in conjunction with VIN0 Range 0 bit (see Table 36) to specify the input range of VIN0

REFADC = 1.25 V.

See Table 38 for bit descriptions.

Table 38. VINx Range 1 and VIN Range 0 Bit Descriptions

VIN Range 0, VINx1 Range Bit

VIN Range 1, VINx1 Range Bit

VINx1 Input Range Bit

4 × REFADC (default)

2 × REFADC

REFADC

x = 3, 2, 1, or 0.

Table 39. VINx Differential/Single-Ended Enable Register (Register 0x17)

Bit Number(s)

Bit Name

Description

[D15:D10]

Reserved

VIN2_VIN3_PDIFF

VIN2 and VIN3 pseudo differential mode

0: disable (default)

1: enable

VIN0_VIN1_PDIFF

VIN0 and VIN1 pseudo differential mode

0: disable (default)

1: enable

[D7:D2]

Reserved

VIN2_VIN3_DIFF

VIN2 and VIN3 differential mode

0: disable (default)

1: enable

VIN0_VIN1_DIFF

VIN0 and VIN1 differential mode

0: disable (default)

1: enable

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