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AD7293 Datasheet(PDF) 45 Page - Analog Devices

Part # AD7293
Description  12-Bit Power Amplifier Current Controller
PDF  78 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD7293 Datasheet(HTML) 45 Page - Analog Devices

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Data Sheet
AD7293
Rev. B | Page 45 of 78
SEQUENCE (PAGE 0x03)
The sequence page contains registers that allow the user to
sequence and read back the conversions results from selected
channels in command mode.
Table 52. Sequence (Page 0x03)
Address
(Hex)
Name
Byte1
Access
Type1
Default
Value1
0x00
No op
N/A
N/A
0x00
0x01
Page select pointer
1
R/W
0x00
0x02
Conversion command2
1
W
N/A
0x03
Result
2
R
0x0000
0x04
DAC enable
1
R/W
0x00
0x05
GPIO
1
R/W
0x00
0x0C
Device ID
2
R
0x0018
0x0F
Software reset
2
R/W
0x0000
0x10
VINx sequence
2
R/W
0x0000
0x11
ISENSEx and TSENSEx
sequence
2
R/W
0x0000
0x12
RSx+MON, supply
monitor, and BI-VOUTx
monitor sequence
2
R/W
0x0000
1
N/A means not applicable.
2
Not a physical register.
Voltage Input (VINx) Sequence Register (Register 0x10)
This 16-bit register allows the user to sequence the ADC
conversions for the four input channels in command mode.
Current Sensor (ISENSEx) and Temperature Sensor (TSENSEx)
Sequence Register (Register 0x11)
This 16-bit register allows the user to sequence the results read
back for the four current sense and three temperature sensor
channels. The range for the current sense and temperature
sense channels is fixed at 0 V to REFADC (1.25 V). However, the
corresponding bit from the enable registers on the configuration
page must be set to run a conversion for a temperature sensor
or current sensor channel in command mode.
RSx+MON, Supply Monitor, and BI-VOUTx Monitor Sequence
Register (Register 0x12)
This 16-bit register allows the user to sequence and read back
the ADC conversion results for the four RSx+ pins, four voltage
supplies, and the four DAC monitor channels in command mode.
Table 53. VINx Sequence Register (Register 0x10)
Bit Number(s)
Bit Name
Description
[D15:D4]
Reserved
Reserved
D3
VIN3
1: command mode sequencing enabled
0: command mode sequencing disabled (default)
D2
VIN2
1: command mode sequencing enabled
0: command mode sequencing disabled (default)
D1
VIN1
1: command mode sequencing enabled
0: command mode sequencing disabled (default)
D0
VIN0
1: command mode sequencing enabled
0: command mode sequencing disabled (default)
Table 54. ISENSEx and TSENSEx Sequence Register (Register 0x11)
Bit Number(s)
Bit Name
Description
[D15:D12]
Reserved
Reserved
D11
ISENSE3
0: no control (default)
1: command mode sequencing enabled
D10
ISENSE2
0: no control (default)
1: command mode sequencing enabled
D9
ISENSE1
0: no control (default)
1: command mode sequencing enabled
D8
ISENSE0
0: no control (default)
1: command mode sequencing enabled
[D7:D3]
Reserved
Reserved
D2
TSENSED1
0: no control (default)
1: command mode sequencing enabled
D1
TSENSED0
0: no control (default)
1: command mode sequencing enabled
D0
TSENSEINT
0: no control (default)
1: command mode sequencing enabled



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