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GEMAC

Gesellschaft für

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Zwickauer Straße 227

D-09116 Chemnitz, Germany

Date: 20.04.04

Page 12 of 30

Title:

Data Sheet GC-IP200

Name of Document:

43500-DB-2-1-E-IP200.pdf

Each transfer process is triggered by the sending of a command. To this effect, SEN is kept low during 16

SCLK

clock cycles. The input data at SDI is evaluated a the rising edge of SCLK. At the same time, the

shifting of the data of the hold register is triggered at every rising edge at SCLK.

i15

i14

i13

i12

i11

i10

i9

i8

i7

i6

i5

i4

i3

i2

i1

i0

XX

XX

o15

o14

o13

o12

o11

o10

o9

o8

o7

o6

o5

o4

o3

o2

o1

o0

RDY

RDY

SCLK

SEN

SDI

SDO

Load bit 15 from SDI

Send bit 14 to SDO

Start command processing

SPI-Access:

Figure 7

Name

Min

Max

Description

1)

SPI clock, H time

1)

SPI clock, L time

1)

Waiting time between SEN falling and SCLK rising

Switching delay RDY / SDO from SEN

15 ns

Time between SCLK rising and data read

1)

Setup time SDI before SCLK

Time between SCLK rising and data output

5.2.2

Protocol

Bit No. at signal SDI

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

Name

Description

0

X

0

0

X

X

X

X

X

X

X

X

X

X

X

X

RES

Reserved

0

nB

2)

0

1

H3

2)

H2

2)

H1

2)

H0

2)

A7

A6

A5

A4

A3

A2

A1

A0

WRA

Write Address

0

nB

2)

1

0

H3

2)

H2

2)

H1

2)

H0

2)

D7

D6

D5

D4

D3

D2

D1

D0

WRD

Write Data

0

nB

2)

1

1

H3

2)

H2

2)

H1

2)

H0

2)

C7

C6

C5

C4

C3

C2

C1

C0

WRC

Write Command

1

nB

2)

0

0

H3

2)

H2

2)

H1

2)

H0

2)

A7

A6

A5

A4

A3

A2

A1

A0

RD0

/ST

Read Byte 0 + 1 (LSB)

1)

1

nB

2)

0

1

H3

2)

H2

2)

H1

2)

H0

2)

X

X

X

X

X

X

X

X

RD1

Read Byte 2 + 3 (MSB)

1

nB

2)

1

X

H3

2)

H2

2)

H1

2)

H0

2)

X

X

X

X

X

X

X

X

NOP

Output Read-Register

Bit

Name

Description

0:

Command to all channels (for WRA/WRD/WRC only)

nB

Broadcast mode

(Low-active)

1:

Command to the channel addressed by H(3:0)

H(3:0)

Hardware address

IP200-Channel address for single access (nB=1)

Default: 0x00

A(7:0)

Register address

IP200-Register address

C(7:0)

Command

Single-word command

D(7:0)

Data word

Write data

(readed data appears at SDO)

Command word examples

Set address register in all channels connected at 0x01:

0x1001

Write data 0x48 in channel 0x04:

0x6448

Read L word from register 0x07, one IC existing only:

0x8007

Configuration of the hardware address in all the channels connected:

0x3000