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IP200 Datasheet(PDF) 17 Page - List of Unclassifed Manufacturers |
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IP200 Datasheet(HTML) 17 Page - List of Unclassifed Manufacturers |
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17 / 30 page ![]() Phone: +49 371 33 77 - 0 Fax:: +49 371 33 77 272 Internet: www.gemac-chemnitz.de Email: interpolation@gemac-chemnitz.de sales@gemac-chemnitz.de GEMAC Gesellschaft für Mikroe lektronikanwendung Chemnitz mbH Zwickauer Straße 227 D-09116 Chemnitz, Germany Date: 20.04.04 Page 17 of 30 Title: Data Sheet GC-IP200 Name of Document: 43500-DB-2-1-E-IP200.pdf PHI Interpolation Result - Phase Angle Read Address 0x03 (Byte 1/0) 15:8 7:0 0x00 PHI PHI Interpolated Phase Angle of Input Signals (unsigned, binary) Scaling: 0 ... 200 = 0°... 360°, if IR(2) = 1 0 ... 160 = 0°... 360°, if IR(2) = 0 DPHI Interpolation Result - Phase Angle Difference Read Address 0x03 (Byte 3/2) 15:8 7:0 0x00 DPHI DPHI Difference to last Phase Angle (two’s complement) Scaling: -100 ... +100 = -180°... +180°, if IR(2) = 1 -80 ... +80 = -180°... +180°, if IR(2) = 0 CFG0 Configuration Register 0 Read Address 0x01 (Byte 1) Write Address 0x00 Default Configuration pins will be read (IT0=0) 7 6 5:3 2:0 SPEED GFE IT(2:0) IR(2:0) IR(2:0) Interpolation Rate Square Wave Periods A/B IT(2:0) Interval Time tpp in 1/ fOSZ 000 160 40 000 1 001 80 20 001 *) 2 010 40 10 010 4 011 20 5 011 *) 8 100 200 50 100 16 101 100 25 101 *) 32 110 50 12½ 110 64 111 25 6¼ 111 *) 128 *) only selectable over SPI GFE 0 Glitch Filter deactivated 1 Glitch Filter activated SPEED 0 Configure speed monitoring for A/B outputs 1 Configure speed monitoring for internal counter The double function pins SDI and TRG are used for initializing of the GFE and SPEED bits during reset processing. The IT0 bit can only be assigned over serial interface. For more information refere also to IP200 application notes. |
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