GS3470 datasheet(55/169 Pages) SEMTECH

55 / 169 page

GS3470

Final Data Sheet

Rev.8

PDS-060500

September 2017

55 of 169

Semtech

www.semtech.com

4.15 EDH Detection

4.15.1 EDH Packet Detection (SD Only)

The GS3470 determines if EDH packets are present in the incoming video data and

asserts the EDH_DETECT status according to the SMPTE standard.

EDH_DETECT is set HIGH when EDH packets have been detected and remains HIGH

until EDH packets are no longer present. It is set LOW at the end of the vertical blanking

(falling edge of V) if an EDH packet has not been detected during vertical blanking.

EDH_DETECT can be programmed to be an output on the STAT[5:0] pins through GSPI.

4.15.2 EDH Flag Detection

The EDH flags for ancillary data, active picture, and full field regions are extracted from

the detected EDH packets and placed in the EDH_FLAG_IN register.

When the EDH_FLAG_UPDATE_MASK bit in the host interface is set HIGH, the GS3470

updates the Ancillary Data, Full Field, and Active Picture EDH flags according to SMPTE

RP165. The updated EDH flags are available in the EDH_FLAG_OUT register. The EDH

packet output from the device contains these updated flags.

Flags are provided for both fields 1 and 2. The field 1 flag data is overwritten by the field

2 flag data.

When EDH packets are not detected, the UES flags in the EDH_FLAG_OUT register are

set HIGH to signify that the received signal does not support Error Detection and

Handling. In addition, the EDH_DETECT bit is set LOW. These flags are set regardless of

the setting of the EDH_FLAG_UPDATE_MASK bit.

EDH_FLAG_OUT and EDH_FLAG_IN may be read via the host interface at any time

during the received frame except on the lines defined in SMPTE RP165, when these flags

are updated.

The GS3470 indicates the CRC validity for both active picture and full field CRCs. The

AP_CRC_V bit in the host interface indicates the active picture CRC validity, and the

FF_CRC_V bit indicates the full field CRC validity. When EDH_DETECT = LOW, these bits

are cleared.

The EDH_FLAG_OUT and EDH_FLAG_IN register values remain set until overwritten

by the decoded flags in the next received EDH packet. When an EDH packet is not

detected during vertical blanking, the flag registers are cleared at the end of the vertical

blanking period.

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