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GS3470 Datasheet(PDF) 27 Page - Semtech Corporation |
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GS3470 Datasheet(HTML) 27 Page - Semtech Corporation |
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27 / 169 page ![]() GS3470 Final Data Sheet Rev.8 PDS-060500 September 2017 27 of 169 Semtech www.semtech.com 4.6 Serial Digital Retimer The retimer operates at three frequencies: 2.97Gb/s, 1.485Gb/s, and 270Mb/s. Note: The SD/HD bit takes precedence over the 3G/HD bit, so if the SD/HD bit is HIGH, the 3G/HD bit is ignored. The retimer can automatically determine the supported rate based on the input signal, or the rate can be set manually. For more detail on these modes, please refer to Section 4.3.1. 4.7 External Crystal/Reference Clock The GS3470 requires an external 27MHz reference clock for correct operation. This reference clock is generated by connecting a crystal to the XTAL and XTAL pins of the device. Refer to Typical Application Circuit. A crystal with a maximum frequency variation of ±100ppm and a maximum equivalent resistance of 50Ω should be selected.The external crystal is used in the frequency acquisition process. It has no impact on the output jitter performance of the device when the device is locked to incoming data. Alternately, a 27MHz external clock source can be connected to the XTAL pin of the device. It is recommended to DC-couple the reference clock input and to ensure the reference clock does not exceed 1.2V. 4.8 Lock Detect The LOCKED output signal is set HIGH by the Lock Detect block under the following conditions: Table 4-3: Serial Digital Output SERIAL_LOOPBACK_EN RC_BYP DDO/DDO 0X Disabled 1 0 Re-timed 1 1 Buffered (not Re-timed) Table 4-4: Lock Detect Conditions Mode of Operation Mode Setting Condition for Locked SMPTE Mode SMPTE_BYPASS = HIGH DVB_ASI = LOW Retimer PLL is locked to valid SMPTE video. |
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