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GS3470 Datasheet(PDF) 87 Page - Semtech Corporation

Part # GS3470
Description  3G, HD, SD SDI Receiver
PDF  169 Pages
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Manufacturer  SEMTECH [Semtech Corporation]
Direct Link  http://www.semtech.com
Logo SEMTECH - Semtech Corporation

GS3470 Datasheet(HTML) 87 Page - Semtech Corporation

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GS3470
Final Data Sheet
Rev.8
PDS-060500
September 2017
87 of 169
Semtech
www.semtech.com
4.20.1 CS Pin
The Chip Select pin (CS) is an active-low signal provided by the host processor to the
GS3470.
The HIGH-to-LOW transition of this pin marks the start of serial communication to the
GS3470.
The LOW-to-HIGH transition of this pin marks the end of serial communication to the
GS3470.
There is an option for each device to use a separate unique Chip Select signal from the
host processor or for up to 32 devices to be connected to a single Chip Select when
making use of the Unit Address feature.
Only those devices whose Unit Address matches the UNIT ADDRESS in the GSPI
Command Word will respond to communication from the host processor (unless the
B’CAST ALL bit in the GSPI Command Word is set to 1).
4.20.2 SDIN Pin
The SDIN pin is the GSPI serial data input pin of the GS3470.
The 16-bit Command and Data Words from the host processor or from the SDOUT pin of
other devices are shifted into the device on the rising edge of SCLK when the CS pin is
low.
4.20.3 SDOUT Pin
The SDOUT pin is the GSPI serial data output of the GS3470.
All data transfers out of the GS3470 to the host processor or to the SDIN pin of other
connected devices occur from this pin.
By default at power up or after system reset, the SDOUT pin provides a non-clocked path
directly from the SDIN pin, regardless of the CS pin state, except during the GSPI Data
Word portion for read operations to the device. This allows multiple devices to be
connected in Loop-Through configuration.
For read operations, the SDOUT pin is used to output data read from an internal
Configuration and Status Register (CSR) when CS is LOW. Data is shifted out of the device
on the falling edge of SCLK, so that it can be read by the host processor or other
downstream connected device on the subsequent SCLK rising edge.



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