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AD9175 Datasheet(PDF) 116 Page - Analog Devices |
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AD9175 Datasheet(HTML) 116 Page - Analog Devices |
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116 / 150 page  AD9175 Data Sheet Rev. A | Page 116 of 150 Addr. Name Bits Bit Name Settings Description Reset Access 0x312 SYNCOUT_GEN_1 [7:4] SYNC_ERR_DUR Duration of SYNCOUTx± low for the purposes of the synchronization error report. Duration = (0.5 + code) PCLK cycles. To most closely match the specified value, set these bits as close as possible to f/2 PCLK cycles. These bits are shared between SYNCOUT0± and SYNCOUT1±. 0x0 R/W [3:0] RESERVED Reserved. 0x0 R/W 0x315 PHY_PRBS_TEST_EN [7:0] PHY_TEST_EN Enable PHY BER by ungating the clocks. 0x0 R/W 0 PHY test disable. 1 PHY test enable. 0x316 PHY_PRBS_TEST_ CTRL 7 RESERVED Reserved. 0x0 R [6:4] PHY_SRC_ERR_CNT 0x0 R/W 000 Report Lane 0 error count. 001 Report Lane 1 error count. 010 Report Lane 2 error count. 011 Report Lane 3 error count. 100 Report Lane 4 error count. 101 Report Lane 5 error count. 110 Report Lane 6 error count. 111 Report Lane 7 error count. [3:2] PHY_PRBS_PAT_SE L Select PRBS pattern for PHY BER test. 0x0 R/W 00 PRBS7. 01 PRBS15. 10 PRBS31. 11 Not used. 1 PHY_TEST_START Starts and stops the PHY PRBS test. 0x0 R/W 0 Test not started. 1 Test started. 0 PHY_TEST_RESET Resets PHY PRBS test state machine and error counters. 0x0 R/W 0 Not reset. 1 Reset. 0x317 PHY_PRBS_TEST_ THRESHOLD_ LOBITS [7:0] PHY_PRBS_ THRESHOLD_ LOBITS Bits[7:0] of the 24-bit threshold value to set the error flag for the PHY PRBS test. 0x0 R/W 0x318 PHY_PRBS_TEST_ THRESHOLD_ MIDBITS [7:0] PHY_PRBS_ THRESHOLD_ MIDBITS Bits[15:8] of the 24-bit threshold value to set the error flag for the PHY PRBS test. 0x0 R/W 0x319 PHY_PRBS_TEST_ THRESHOLD_HIBITS [7:0] PHY_PRBS_ THRESHOLD_ HIBITS Bits[23:16] of the 24-bit threshold value to set the error flag for the PHY PRBS test. 0x0 R/W 0x31A PHY_PRBS_TEST_ ERRCNT_LOBITS [7:0] PHY_PRBS_ERR_ CNT_LOBITS Bits[7:0] of the 24-bit reported PHY BER error count from the selected lane. 0x0 R 0x31B PHY_PRBS_TEST_ ERRCNT_MIDBITS [7:0] PHY_PRBS_ERR_ CNT_MIDBITS Bits[15:8] of the 24-bit reported PHY BER error count from the selected lane. 0x0 R 0x31C PHY_PRBS_TEST_ ERRCNT_HIBITS [7:0] PHY_PRBS_ERR_ CNT_HIBITS Bits[23:16] of the 24-bit reported PHY BER error count from the selected lane. 0x0 R 0x31D PHY_PRBS_TEST_ STATUS [7:0] PHY_PRBS_PASS Reports PHY BER pass/fail for each lane. Bit x is high when Lane x passes. 0xFF R 0x31E PHY_DATA_ SNAPSHOT_CTRL [7:2] RESERVED Reserved. 0x0 R 1 PHY_GRAB_MODE This bit determines whether to use the trigger to grab data. 0x0 R/W 0 Grab data when PHY_GRAB_DATA is set. 1 Grab data upon bit error. |
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