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LXT975B Datasheet(PDF) 26 Page - Intel Corporation |
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LXT975B Datasheet(HTML) 26 Page - Intel Corporation |
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26 / 74 page ![]() LXT974/LXT975 — Fast Ethernet 10/100 Quad Transceivers 26 Datasheet Individual chip addressing allows multiple LXT974/975 devices to share the MII in either mode. Table 15 through Table 17 show how to set up the desired operating configurations using the Hardware Control Interface. Table 15. Configuring the LXT974/975 via Hardware Control Desired Configuration Pin Name Input Value MDIO Registers Auto-Negotiation Enabled on all ports1, 2, 3 AUTOENA High 0.12 = 1 SD/TPn Low 19.2 = 0 Auto-Negotiation Disabled on all ports4 AUTOENA Low 0.12 = 0 Scrambler Bypassed on all ports BYPSCR High 19.3 = 1 Scrambler Enabled on all ports BYPSCR Low 19.3 = 0 1. SD/TPn must be set Low for Auto-Negotiation operation. 2. Refer to Table 16 for Hardware Control Interface functions advertised when auto-negotiation is enabled. 3. Fiber operation can be forced per port via SD/TPn pins when auto-negotiation is enabled. See Table 17 for details. 4. Refer to Table 17 for Hardware Control Interface functions available when auto-negotiation is disabled. Table 16. Configuring LXT974/975 Auto-Negotiation Advertisements Via Hardware Control Desired Configuration1,2 Pin Settings MDIO Registers SD/TPn (per port) FDE (global) CFG_2 (global) CFG_1 (global) CFG_03 (global) 4.5 4.6 4.7 4.8 Advertise All Low Ignore Low Low Ignore 1 1 1 1 Advertise 100 HD Low Low High Low Ignore 0 0 1 0 Advertise 100 HD/FD Low High High Low Ignore 0 0 1 1 Advertise 10 HD Low Low Low High Ignore 1 0 0 0 Advertise 10 HD/FD Low High Low High Ignore 1 1 0 0 Advertise 10/100 HD Low Low High High Ignore 1 0 1 0 1. Refer to Table 15 for basic configurations. 2. Refer to Table 17 for Hardware Control Interface functions available when auto-negotiation is disabled. 3. Auto-Negotiation is not affected by CFG_0. |
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