LXT975B datasheet(35/74 Pages) INTEL

35 / 74 page

Fast Ethernet 10/100 Quad Transceivers — LXT974/LXT975

Datasheet

2.5.5

PMA Sublayer

2.5.5.1

Link

The LXT974/975 supports a Standard link algorithm or Enhanced link algorithm, which can be set

via bit 16.1. Link is established when the symbol error rate is less than 64 errors out of 1024

symbols received. Once the link is established:

When standard link algorithm is selected (default, bit 16.1 = 0), the link goes down when the

symbol error rate becomes greater than 64 out of 1024.

When enhanced link algorithm is selected (bit 16.1 = 1), the link goes down if twelve idle

symbols in a row are not received within 1 to 2 ms. This mode makes it more difficult to bring the

link down.

In either mode, the LXT974/975 reports link failure via the MII status bits (1.2, 18.15, and 20.13)

and interrupt functions. If auto-negotiate is enabled, link failure causes the LXT974/975 to re-

negotiate.

2.5.5.2

Link Failure Override

The LXT974/975 normally transmits 100 Mbps data packets or Idle symbols only if it detects the

link is up, and transmits only FLP bursts if the link is not up. Setting bit 19.14 = 1 overrides this

function, allowing the LXT974/975 to transmit data packets even when the link is down. This

feature is provided as a diagnostic tool. Note that auto-negotiation must be disabled to transmit data

packets in the absence of link. If auto-negotiation is enabled, the LXT974/975 automatically

begins transmitting FLP bursts if the link goes down.

2.5.5.3

Carrier Sense (CRS)

For 100TX and 100FX links, a start of stream delimiter or /J/K symbol pair causes assertion of

carrier sense (CRS). An end-of-stream delimiter, or /T/R symbol pair causes de-assertion of CRS.

The PMA layer also de-asserts CRS if IDLE symbols are received without /T/R; however, in this

case RX_ER is asserted for one clock cycle when CRS is de-asserted.

For 10T links, CRS assertion is based on reception of valid preamble, and de-assertion on reception

of an end-of-frame (EOF) marker.

2.5.6

Twisted-Pair PMD Sublayer

The twisted-pair Physical Medium Dependent (PMD) layer provides the signal scrambling and

descrambling, line coding and decoding (MLT-3 for 100TX, Manchester for 10T), as well as

receiving, polarity correction, and baseline wander correction functions.

2.5.6.1

Scrambler/Descrambler (100TX Only)

The purpose of the scrambler is to spread the signal power spectrum and further reduce EMI using

an 11-bit, non-data-dependent polynomial. The receiver automatically decodes the polynomial

whenever IDLE symbols are received.

The scrambler/descrambler can be bypassed by either setting bit 19.3 = 1 or setting pin (BYPSCR)

High. The scrambler is automatically bypassed when the fiber port is enabled. Scramber bypass is

provided for diagnostic and test support.

LXT975B Datasheet(PDF) 35 Page - Intel Corporation

LXT975B Datasheet(HTML) 35 Page - Intel Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74

Datasheet Download

Link URL