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SAM5708B Datasheet(PDF) 30 Page - List of Unclassifed Manufacturers |
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SAM5708B Datasheet(HTML) 30 Page - List of Unclassifed Manufacturers |
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30 / 89 page ![]() SAM5708B SAM5708B.pdf – Rev 14/05/2018 30 © 2015-2018 Dream S.A.S., France 4.3.9. NOR Flash and SRAM as primary function Pin name Pin# Type Mem Cfg Description MA16-MA18 71-73 Out DR8 1,2,4,5 Address bits for external SRAM and NOR Flash memories, extension to 8Mbits (512kx16). P1.0-P1.2 71-73 I/O 5VT (PD) DR8 SR3 1,2,4,5 General purpose I/O pin. MA19-MA26 76 78-84 Out DR8 1,2 Address bits for external SRAM and NOR Flash memory, up to 2Gbit (256MByte). XFR_RDY 83 Out DR8 1,2 Host parallel interface “Transfer Ready” output. When A1 = 1, this pin is reflecting status of current data read/write. Before beginning next read/write, host has to check XFR_RDY is 1 A1 84 In 5VT 1,2 Host parallel interface address 1: A1=0 selects mode 0 for communication/control A1=1 selects mode 1 for fast 8/16bit data transfer P1.3-P1.10 76, 78-84 I/O 5VT (PD) DR8 SR3 1,2 General purpose I/O pin. MWE/ 74 Out DR12 1,2,4,5 External SRAM and NOR Flash memories write enable, active low. P1.11 74 I/O (PU) DR12 SR3 1,2,4,5 General purpose I/O pin. MOE/ 75 Out DR8 1,2,4,5 External SRAM and NOR Flash memory output enable, active low. P1.12 75 I/O 5VT (PU) DR8 SR3 1,2,4,5 General purpose I/O pin. NRCS0/ 10 Out DR4 1,2 External NOR Flash memory chip select 0, active low. P1.13 10 I/O (PU) DR4 SR3 1,2 General purpose I/O pin. NRCS1/ 11 Out DR12 1,2 External NOR Flash memory chip select 1, active low. P1.14 11 I/O (PU) DR12 1,2 General purpose I/O pin. SRCS/ 69 Out DR4 2,4,5 External SRAM memory chip select, active low. P1.15 69 I/O (PU) DR4 2,4,5 General purpose I/O pin. 4.3.10. NAND Flash as primary function Pin name Pin# Type Mem Cfg Description NDIO0-NDIO6 111-117 I/O DR8 3,4 Data bus for external 8-bit NAND Flash memory. NDIO7 118 I/O DR4 NDCE0/ 98 Out DR12 3,4 External NAND Flash memory chip select 0, active low NDCE1/ 99 Out DR4 3,4 External NAND Flash memory chip select 1, active low P3.12 99 I/O (PU) DR4 3,4 General purpose I/O pin. NDR|B/ 100 In 5VT 3,4 External NAND Flash Ready Busy/ status. Indicates target array activity. External pull-up resistor is needed if NAND Flash R|B/ is open-drain output. NDALE 101 Out DR8 3,4 External NAND Flash Address Latch Enable. Load an address from I/O[7:0] into the address register. NDCLE 102 Out DR8 3,4 External NAND Flash Command Latch Enable. Load a command from I/O[7:0] into the command register NDWE/ 103 Out DR8 3,4 External NAND Flash Write Enable. Transfer commands, address, and serial data from SAM5708B to the NAND Flash. NDRE/ 104 Out DR4 3,4 External NAND Flash Read Enable. Transfer serial data from the NAND Flash to SAM5708B. |
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