SAM5708B datasheet(6/89 Pages) ETC1

6 / 89 page

SAM5708B

SAM5708B.pdf

– Rev 14/05/2018

1.7.

On-chip memory

Besides distributed memory in P24XT DSP cores (8 * 2Kx24-bit RAM for a total of 384kbits) and in

communication controllers, the SAM5708B offers 1.4M bits of on-chip memory. One part of this

memory (P16XT-RAM) is reserved for direct access by the P16XT (tightly coupled code/cache

memory). The second part of this memory (MAIN-RAM) is used as data memory and can be

accessed by any master through the asynchronous bus.

The memory partitioning is configurable by firmware. The memory space is divided into 4 banks:

 Bank 0 has a size of 256kbits and is accessed by P16XT only.

 Banks 1 & 2 have a size of 384kbits and can be either used as code/cache memory for

P16XT or as main data memory

 Bank 3 has a size of 384kbits and is always used as main data ram

RAMCFG=’00’

RAMCFG=’01’

RAMCFG=’10’

P16XT

RAM

Main

RAM

P16XT

RAM

Main

RAM

P16XT

RAM

Main

RAM

Bank0

256 kbits

16kx16

Bank1

384 kbits

16kx24

24kx16

Bank2

384 kbits

16kx24

24kx16

Bank3

384 kbits

16kx24

Total

256kbits

16kx16

1152kbits

48kx24

640kbits

40kx16

768kbits

32kx24

1Mbits

64kx16

384kbits

16kx24

1.8.

Multi-channel DMA controller

The DMA controller is intended to perform high-speed memory-to-memory data transfers without

using CPU resources: blocks can be copied from one source address to one destination address

with a specified length, while both source and destination addresses are self-incremented. Taking

advantage of the multi-layer architecture, this module can operate on several channels in parallel.

Moreover, the DMA controller is able to automatically perform 24-bit to 16-bit transformation when

data blocks are transferred from internal to external memories. For making the handling of delay

lines easier, circular buffers are also supported.

Main features:

 The DMA controller has 4 channels

 programmable block length and source & destination addresses

 supports word and burst transfers

 supports ring buffers

 transparent 24-bit to 16-bit transformation

1.9.

Sample Cache System

Thanks to its sample cache system, the SAM5708B can support up to 189 voices of polyphony

with sound banks stored in SDRAM / NOR-Flash / NAND-Flash or Quad-SPI NOR-Flash. With

NAND-Flash, cache memory must be extended in external SRAM/SDRAM.

SAM5708B Datasheet(PDF) 6 Page - List of Unclassifed Manufacturers

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