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SAM5708B Datasheet(PDF) 44 Page - List of Unclassifed Manufacturers

Part # SAM5708B
Description  AUDIO & MUSIC MULTI-DSP PROCESSOR
PDF  89 Pages
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Manufacturer  ETC1 [List of Unclassifed Manufacturers]
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SAM5708B Datasheet(HTML) 44 Page - List of Unclassifed Manufacturers

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SAM5708B
SAM5708B.pdf
– Rev 14/05/2018
44
© 2015-2018 Dream S.A.S., France
8. Peripherals and Timings
A built-in PLL multiplies the Xtal clock frequency by a variable multiplication factor (typ. x16) to
generate the internal chip system clock (
“SysClk”, typ. 196.6MHz @ 12.288MHz quartz).
“spck” is the period of the internal clock. Typical value with Xtal = 12.288 MHz is spck = 5.1 ns.
Another clock MemClk is generated from SysClk for NOR Flash, SRAM, and SDRAM controllers.
mpck is the period of MemClk.
mpck = spck or spck*2. Typical values with Xtal = 12.288 MHz are mpck = 10.2 ns or 5.1 ns.
8.1.
NOR Flash external memory
Pins used:
MA26-MA0: Address out
MD15-MD0: Data bi-directional
NRCS0/, NRCS1/: chip select
MOE/: Output enable
MWE/: Write enable
8.1.1. NOR Flash READ CYCLE
MemClk
MA[26:0]
MOE/
NOR Flash, single read access, N=6, Nt=1
N = MemClk Cycle Number from NRCSx/ low to MOE/ high
N can be set in range 2-16
trdc
MD[15:0]
NRCSx/
tavdv
tavoel
VALID
VALID
tpoe
tbta
Nt = MemClk Cycle Number from MOE/ high to NRCSx/ high
Nt can be set in range 0-15
tds
tdh
toedv



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