SAM5708B datasheet(7/89 Pages) ETC1

7 / 89 page

SAM5708B

SAM5708B.pdf

– Rev 14/05/2018

1.10. Two-port memory controller

The two-port memory controller enables the SAM5708B to interface with various, parallel or serial,

memory types:

Config

Port0

Port1

KBD Interface

16-bit SDRAM + NOR Flash

16-bit SRAM + NOR Flash

16-bit SDRAM

8-bit SLC NAND Flash (with ECC)

16-bit SRAM

8-bit SLC NAND Flash (with ECC)

16-bit SRAM

QuadSPI-SRAM

QuadSPI-NOR

Yes

Memory configurations are defined with pull-resistors externally connected to dedicated pins and

are read by boot program at power-up from dedicated pins or fuse bits.

Configuration 6 with low pin-count serial memory interfaces is dedicated to keyboard applications.

For the storage of sound banks, address lines support

 up to 2 x 256MBytes of non-volatile NOR Flash memory

 up to 2 x 4GBytes of non-volatile NAND Flash memory

The two-port memory controller handles transfer requests initiated by masters like P16XT CPU,

P24XT DSP cores, DMA controller, Sample cache system or other communication controllers

through both XBUS asynchronous busses.

Control registers are accessed by the P16XT for defining configuration and optimizing frequency

and latency parameters. Burst transfers are always initiated when possible.

1.11. Router: final ACC, MIX, audio out, audio in

This block includes a RAM, accessed through the Async Bus, which defines the routing from the

Sync Bus to/from the Audio I/O or back to the Sync Bus (mix send). It takes care of mix and

accumulation from Sync Bus samples. 16 channels of audio in and 16 channels of audio out are

provided (8 stereo in/out, I2S or MSB Left format). The stereo audio in channel may have a

different sampling rate than the audio out channels. In this case, one or more P24s take care of

sampling rate conversion.

1.12. External Host Interface

The Host Parallel Interface is used for fast read/write transfers between an external host processor

and the SAM5708B. E.g. it allows an external host to be a master for fast data transfer to

SAM5708B connected memories (the handshake protocol for the fast data transfer is driven by the

firmware).

This module is connected internally to asynchronous busses.

SAM5708B Datasheet(PDF) 7 Page - List of Unclassifed Manufacturers

SAM5708B Datasheet(HTML) 7 Page - List of Unclassifed Manufacturers

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89

Datasheet Download

Link URL