SAM5708B datasheet(72/89 Pages) ETC1

72 / 89 page

SAM5708B

SAM5708B.pdf

– Rev 14/05/2018

8.11. I²S Digital audio

Pins used:

CLBD, WSBD (outputs): Audio clocks

DABD7-0: Digital audio outputs (8 * 2 channels)

DAAD7-0: Digital audio inputs(8 * 2 channels)

And optionally

XCLBD0-XWSBD0, XCLBD0-XWSBD0 (inputs): 2 pairs of external clocks for slave mode on

DAAD7-0 inputs.

The SAM5708B allows for 16 digital audio output channels and 16 digital audio input channels. All

audio channels are normally synchronized on single clocks CLBD, WSBD which are derived from

the IC crystal oscillator. However, as a firmware option, the DAAD7-0 inputs can be individually

synchronized with incoming XCLBD and XWSBD signals. In this case, the incoming sampling

frequencies must be lower or equal to the chip sampling frequency.

The digital audio timing follows the I2S or MSB left standard, with up to 24 bits per sample

The choice of clock factors is done by the firmware. As an example, table below show some

possible clock combinations with 12.288MHz Xtal.

Sampling Rate @

Xtal=12.288MHz

CKOUT freq

CKOUT/WSBD

freq ratio

CLBD freq

CLBD/WSBD

freq ratio

48kHz

12.288MHz

256

3.072MHz

48kHz

24.576MHz

512

3.072MHz

96kHz

12.288MHz

128

6.144MHz

96kHz

24.576MHz

256

6.144MHz

192kHz

24.576MHz

128

12.288MHz

Note: WSBD/CLBD ratio is always 64.

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