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SAM5708B Datasheet(PDF) 63 Page - List of Unclassifed Manufacturers |
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SAM5708B Datasheet(HTML) 63 Page - List of Unclassifed Manufacturers |
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63 / 89 page ![]() SAM5708B SAM5708B.pdf – Rev 14/05/2018 63 © 2015-2018 Dream S.A.S., France 8.8. Host Parallel Interface This interface is used to connect the SAM5708B to an external host processor for control and fast data transfer. Firmware can be downloaded at power-up through this interface. 8.8.1. Host Parallel Interface (HPI) mode 0 Pins used in mode 0 (A1=0): D7-D0: 8-bit Data I/O CS/: Chip Select from host (input) A1-A0: Addresses from host (input), A1=0 to select mode 0, A0 for data selection WR/: Write from host (input) RD/: Read from host (input) IRQ (optional): Interrupt Request (output) This mode is typically used to send MIDI messages or other control data from the Host CPU (master) to the SAM5708B (slave). 8.8.1.1. HPI mode 0, Timings tcslrdl CS/ RD/ A[1:0] D[7:0] tprd trdhcsh tavdv tarh trdldv tdrh HPI mode 0, read cycle tavrdh tdvrdh tdah Parameter Symbol Min Typ Max Unit Chip select low to RD/ low tcslrdl 2 - - ns RD/ pulse width tprd 10 - - ns RD/ high to CS/ high trdhcsh 3 - - ns Address valid to RD/ high tavrdh 3 - - ns Address valid to data valid tavdv - - 10 ns RD/ low to data valid trdldv - - 10 ns Data valid to RD/ high tdvrdh 3 - - ns Address out hold from RD/ tarh 3 - - ns Data out hold from RD/ tdrh 0 - 10 ns Data out hold from address out tdah 0 - 10 ns Notes: 1. tcslrdl Min and trdhcsh Min can be reduced to 0 ns if 3 ns are added to tprd Min, tarh Min, tdrh Min, tavrdh Min, tdvrdh Min |
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