SAM5708B datasheet(59/89 Pages) ETC1

59 / 89 page

SAM5708B

SAM5708B.pdf

– Rev 14/05/2018

8.5.

Multi-purpose Quad SPI interface

This is a master synchronous serial interface, operating in Single or Quad SPI mode 0.

Quad SPI mode is driven by a powerful QSPI controller with following features:

- Handles automatic Read/write transfer through standard P16 instructions

- Programmable address and data formats

- Programmable data bit number

- Programmable clock up to 100MHz

- Multi-burst mode

Single SPI mode can be driven by the QSPI controller, but also by a Simple SPI interface through

two IO registers.

Pins used in Single SPI:

SPICK: Clock output

SPICS0/, SPICS1/, SPICS2/, SPICS3/: Chip select for up to 4 devices

SPI0: Serial Output to be connected to SI input of SPI peripheral (MOSI)

SPI1: Serial Input to be connected to SO output of SPI peripheral (MISO)

Pins used in Quad SPI:

SPICK: Clock output

SPICS0/, SPICS1/, SPICS2/, SPICS3/: Chip select for up to 4 devices

SPI0: Serial IO0 for Quad commands and data

SPI1: Serial IO1 for Quad commands and data

SPI2: Serial IO2 for Quad commands and data

SPI3: Serial IO3 for Quad commands and data

8.5.1. Timing

SPICK

SPI0(SI)

SPI Single Bit Output

SPICSx/

tcss

MSB OUT

LSB OUT

tos

toh

tch

tcl

tcs

tcsh

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