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AX58200 Datasheet(PDF) 104 Page - ASIX Electronics Corporation

Part # AX58200
Description  EtherCAT Slave Controller SoC
PDF  180 Pages
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Manufacturer  ASIX [ASIX Electronics Corporation]
Direct Link  http://www.asix.com.tw
Logo ASIX - ASIX Electronics Corporation

AX58200 Datasheet(HTML) 104 Page - ASIX Electronics Corporation

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Copyright © 2019 ASIX Electronics Corporation. All rights reserved.
AX58200
EtherCAT Slave Controller SoC
2.43.4 ESC Configuration
2.43.4.1 Bootstrap Pins for Chip Configuration
The AX58200 supports five multi-function bootstrap pins (pin L1, L2, E9, J10 and J11) for five hardware
configurations, i.e. external I2C EEPROM size, ESC supported port number, RSTO polarity and integrated port
0/1 PHY media mode; and it also supports other three multi-function bootstrap pins (pin A9, H9, G11) for the
configuration of port 2 MII signals. User needs to utilize an external resistor to pull up / down these bootstrap pins.
Pins
Signal Name
Description
L1
EEP_SIZE
I2C EEPROM Size
0: 1 Kbit to 16Kbit
1: 32Kbit to 4Mbit
L2
3PORT_MODE
ESC port number
0: 2 ports mode
1: 3 ports mode
E9
RSTO_POL
RSTO Reset Output Polarity
0: Active Low
1: Active High
B10
PDI_EMU
Device emulation (0x0141.0)
0: Device status register is controlled by PDI
1: Device status register is identical to device control register
J10
P0_FIBER
Port 0 PHY media mode
0: Copper mode
1: Fiber mode
J11
P1_FIBER
Port 1 PHY Media mode
0: Copper mode
1: Fiber mode
A9
TX_SH [1]
Port 2 MII TXD Align position
2‘b00: Align with MCLK,
2’b01: Delay 1/4 phase with MCLK
2’b10: Delay 1/2 phase with MCLK
2’b11: Delay 3/4 phase with MCLK
H9
TX_SH [0]
G11
LINK_POL
Port 2 MII LINK Polarity
0: Active Low
1: Active High
Table 2.43-1: ESC Bootstrap Pins Configuration



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