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AX58200 Datasheet(PDF) 142 Page - ASIX Electronics Corporation |
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AX58200 Datasheet(HTML) 142 Page - ASIX Electronics Corporation |
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142 / 180 page ![]() 142 Copyright © 2019 ASIX Electronics Corporation. All rights reserved. AX58200 EtherCAT Slave Controller SoC Power–up Sequence Figure 3.10-1: Power-up Sequence Timing Diagram Symbol Parameter Conditions Min Typ Max Units Trise3 3.3V power supply rise time. From 0V to 3.3V. - 400 - us Trise2 1.2V power supply rise time. From 0V to 1.2V. - 200 - us T23 VCCK rising to 1.2V to VCC3IO rising to 3.3V interval. - 200 - us Trst RSTn asserted low level interval. From VCC3IO rising to 3.3V to RSTn going high. - 40 - us Tclk 25MHz crystal oscillator start-up time. From VCC3IO rising to 3.3V to clock stable of 25MHz crystal oscillator. - - 60 ms TStartup Startup time PDI operational after power good, without I2C EEPROM loading error - - 70 ms Note: The above typical timing data is measured from AX58200 test board. Table 3.10-1: Power-up Sequence Timing Table 0V 3.3V Trise3 0V 1.2V Trise2 T23 Tclk Trst VCCK /VCC12A_PLL VCC3IO/VCC33A RSTn XSCI … |
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