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XRT79L71IB Datasheet(PDF) 34 Page - Exar Corporation |
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XRT79L71IB Datasheet(HTML) 34 Page - Exar Corporation |
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34 / 441 page ![]() XRT79L71 PRELIMINARY áç áç áç áç REV. P1.0.3 1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC 22 M3 TxMod I Transmit PPP Data Bus - Modulo Indicator: This input pin is used to specify the number of valid packet octets are being placed on the TxPData[15:0] input pins. The Link Layer Processor is expected to set this input pin "Low" when both bytes on the TxPData[15:0] data bus is valid packet data. Conversely, the Link Layer Processor is expected to set this input pin "High" when only the upper octet has valid packet data. NOTES: 1. This input pin is only active if the XRT79L71 has been configured to operate in the PPP Mode. 2. The Link Layer Processor is expected to set this input pin to the appropriate state, as each 16-bit word is being written into the TxPData[15:0] data bus. T3 P4 R4 T4 N5 P5 R5 T5 N6 P6 N4 R6 T6 N7 P7 R7 TxUData_0/ TxPData_0 TxUData_1/ TxPData_1 TxUData_2/ TxPData_2 TxUData_3/ TxPData_3 TxUData_4/ TxPData_4 TxUData_5/ TxPData_5 TxUData_6/ TxPData_6 TxUData_7/ TxPData_7 TxUData_8/ TxPData_8 TxUData_9/ TxPData_9 TxUData_10/ TxPData_10 TxUData_11/ TxPData_11 TxUData_12/ TxPData_12 TxUData_13/ TxPData_13 TxUData_14/ TxPData_14 TxUData_15/ TxPData_15 I Transmit UTOPIA Data Bus Inputs/Transmit POS-PHY Data Bus Inputs: The function of these input pins depends upon whether the XRT79L71 is operat- ing in the ATM UNI Mode or in the PPP Mode. ATM UNI Operation - TxUData[15:0]: These input pins comprise the Transmit UTOPIA Data Bus input pins. When the ATM Layer Processor wishes to transmit ATM cell data through the XRT72L74 ATM UNI, it must place this data on these pins. The data, on the Transmit UTO- PIA Data Bus is latched into the Transmit UTOPIA Interface block upon the rising edge of TxUClk. PPP Operation - TxPDATA[15:0] These input pins comprise the Transmit POS-PHY Data Bus input pins. When a Network Processor wishes to transmit PPP data through the XRT79L71 Framer/ UNI IC, it must place this data on these pins. The data, on the Transmit POS- PHY Data Bus is latched into the Transmit POS-PHY Interface block upon the ris- ing edge of TxPClk. PIN #NAME TYPE DESCRIPTION |
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