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XRT79L71IB Datasheet(PDF) 57 Page - Exar Corporation |
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XRT79L71IB Datasheet(HTML) 57 Page - Exar Corporation |
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57 / 441 page ![]() áç áç áç áç PRELIMINARY XRT79L71 1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC REV. P1.0.3 45 NOTE: The values for "t0" through "t11" can be found in Table 6. FIGURE 9. SYNCHRONOUS MODE 4 - IDT 3051/52 INTERFACE TIMING (READ CYCLE) TABLE 6: TIMING INFORMATION FOR THE MICROPROCESSOR INTERFACE, WHEN CONFIGURED TO OPERATE IN THE IBM POWER PC403 MODE Test Conditions: TA = 25°C, VCC = 3.3V±5% and 2.5V±5%, unless otherwise specified. TIMING DESCRIPTION MIN.TYP.MAX. t0 pCS_L low to Clock high 6 - - t1 pALE high to Clock high 1 - - t2 Clock high to pALE low 6 - - t3 Data setup time (WRITE cycle) - - N/N t4 Data hold time (WRITE cycle) - - N/N t5 Clock high to pRDY_L low - - 11 t6 Clock high to pWR_L high 6 - - t7 Clock high to Data valid (READ cycle) - - N/N t8 Clock high to pRDY_L high - - 11 t9 pRDY_L high to Data invalid 0 - - t7 t8 t9 pCLK pCS_L pA[14:0 ] pD[7:0] pRdy_L pWR_L pRD_L t5 pDBEN_L pALE Address t10 t11 Data |
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