XRT79L71IB datasheet(89/441 Pages) EXAR

89 / 441 page

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PRELIMINARY

XRT79L71

1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC

REV. P1.0.3

OPERATION BLOCK INTERRUPT REGISTER BIT FORMATS

OPERATION CONTROL REGISTER - BYTE 3 (ADDRESS = 0X0100)

BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0

Unused

Configuration

Control

R/O

0000

000

BIT NUMBER

NAME

TYPE

DESCRIPTION

7 - 6

Unused

R/O

Configuration Control

R/W

Configuration Control:

This READ/WRITE bit-field permits the user to configure the

XRT79L71 device to support any of the following configurations.

• ATM/PPP

• Clear Channel/HDLC

The following table presents the relationship between the value

written into these register bits and the corresponding Mode of

operation.

OPERATION CONTROL REGISTER - BYTE 2 (ADDRESS = 0X0101)

BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0

Unused

Interrupt

WC/INT*

Enable

Interrupt

Auto-Clear

Interrupt

Enable

R/O

R/W

0000

000

BIT NUMBER

NAME

TYPE

DESCRIPTION

7 - 3

Unused

R/O

Please set to "0" for normal operation.

Interrupt Write to Clear/

RUR

R/W

Interrupt - Write to Clear/RUR Select:

This READ/WRITE bit-field permits the user to configure all of

the "Source-Level" Interrupt Status bits (within the XRT79L71

device) to either be "Write to Clear" (WTC) or "Reset-upon-

Read" (RUR) bits.

0 - Configures all "Source-Level" Interrupt Status register bits to

function as "Reset-upon-Read" (RUR).

1 - Configures all "Source-Level" Interrupt Status register bits to

function as "Write-to-Clear" (WTC).

C onfigura tion C ontro l

M ode

ATM/PPP

C lear C ha nnel/H D LC

XRT79L71IB Datasheet(PDF) 89 Page - Exar Corporation

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