LT3752 datasheet(41/52 Pages) AD

41 / 52 page

LT3752/LT3752-1

Rev. C

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Typically choose CSYNC between 220pF and 1nF. RSYNC

should then be chosen to obey :

(1) SOUTMAX/100mA ≤ RSYNC ≤ √(LMAG/CSYNC)

where,

SOUTMAX = INTVCC

LMAG = TSYNC’S magnetizing inductance

100mA = SOUT gate driver minimum source current

and

(2) RSYNC • CSYNC ≥ (–1) • Y/(ln (Z/SOUTMAX))

where,

Y = SYNC minimum pulse duration (50ns; LT8311)

Z = |SYNC level to achieve Y| (±2V: LT8311)

Even though the LT3752/LT3752-1 INTVCC pin is allowed

to be over driven by as much as 15.4V using the house-

keeping supply, SOUTMAX level should be designed to not

cause TSYNC output to exceed the maximum ratings of the

LT8311’s SYNC pin.

Cost/Space reduction : If discontinuous conduction mode

(DCM) operation is acceptable at light load, the LT8311

has a preactive mode which controls the synchronous

MOSFETs without TSYNC, CSYNC, RSYNC or the LT3752/

LT3752-1 timing resistors RTAS, RTOS (leave open).

Output Inductor Value

The choice of output inductor value LOUT will depend on

the amount of allowable ripple current. The inductor ripple

current is given by:

IL(RIPPLE)(P-P)

= ∆IL = (VOUT/(LOUT • fOSC)) • (1 – (VOUT/VIN)(NP/NS))

TheLT3752/LT3752-1allowverylarge∆ILvalues(lowLOUT

values) without the worry of insufficient slope compensa-

tion—by allowing slope compensation to be programmed

with an external resistor in series with the ISENSEP pin (see

CurrentSensingandProgrammableSlopeCompensation).

Larger∆ILwillallowlowerLOUT,reducingcomponentsize,

but will also cause higher output voltage ripple and core

losses. For LT3752/LT3752-1 applications, ∆IL is typically

chosen to be 40% of IOUT(MAX).

Output Capacitor Selection

The choice of output capacitor value is dependent on

output voltage ripple requirements given by :

∆VOUT ≈ ∆IL(ESR + (1/(8 • fOSC • COUT))

where,

∆IL = output inductor ripple current IL(RIPPLE)(P-P)

ESR = effective series resistance (of COUT)

fOSC = switching frequency

COUT = output capacitance

This gives:

COUT = ∆IL/(8 • fOSC • ( ∆VOUT – ∆IL • ESR))

TypicallyCOUTismadeupofalowESRceramiccapacitor(s)

to minimize ∆VOUT. Additional bulk capacitance is added

in the form of electrolytic capacitors to minimize output

voltage excursions during load steps.

Input Capacitor Selection

The active clamp forward converter demands pulses of

current from the input due to primary winding current and

magnetizing current. The input capacitor is required to

provide high frequency filtering to achieve an input voltage

as close as possible to a pure DC source with low ripple

voltage. For low impedance input sources and medium to

low voltage input levels, a simple ceramic capacitor with

low ESR should suffice. It should be rated to operate at a

worst case RMS input current of :

ICIN(RMS) = (NS/NP) IOUT(MAX)/2

Figure 19. SOUT Pulse Transformer

3752 F19

CSYNC

220pF

RSYNC

560

SYNC

(SECONDARY SIDE

CONTROLLER)

TSYNC

SOUT

(LT3752/LT3752-1)

•

APPLICATIONS INFORMATION

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