DS3172 datasheet(182/232 Pages) DALLAS

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Bit 8: Framing Error Latched (FEL) – This bit is set when a framing error is detected. The type of framing error

event that causes this bit to be set is determined by T3.RCR.FECC[1:0]

Bit 3: C-bit Parity Error Count Latched (CPECL) – This bit is set when the CPEC bit transitions from zero to one.

This bit is set to zero in M23 DS3 mode.

Bit 2: Remote Error Indication Count Latched (FBECL) – This bit is set when the FBEC bit transitions from zero

to one. This bit is set to zero in M23 DS3 mode.

Bit 1: P-bit Parity Error Count Latched (PECL) – This bit is set when the PEC bit transitions from zero to one.

Bit 0: Framing Error Count Latched (FECL) – This bit is set when the FEC bit transitions from zero to one.

T3.RSRIE1

T3 Receive Status Register Interrupt Enable #1

(1,3,5,7)2Ch

Bit #

Name

Reserved

T3FMIE

AICIE

IDLEIE

RUA1IE

Default

Bit #

Name

OOMFIE

SEFIE

COFAIE

LOFIE

RAIIE

AISIE

OOFIE

LOSIE

Default

Bit 11: T3 Framing Format Mismatch Interrupt Enable (T3FMIE) – This bit enables an interrupt if the T3FML bit

is set and the bit in GL.ISRIE.PSRIE[4:1] that corresponds to this port is set.

0 = interrupt disabled

1 = interrupt enabled

Bit 10: Application Identification Channel Interrupt Enable (AICIE) – This bit enables an interrupt if the AICL bit

is set and the bit in GL.ISRIE.PSRIE[4:1] that corresponds to this port is set.

0 = interrupt disabled

1 = interrupt enabled

Bit 9: DS3 Idle Signal Change Interrupt Enable (IDLEIE) – This bit enables an interrupt if the IDLEL bit is set and

the bit in GL.ISRIE.PSRIE[4:1] that corresponds to this port is set.

0 = interrupt disabled

1 = interrupt enabled

Bit 8: Receive Unframed All 1’s Interrupt Enable (RUA1IE) – This bit enables an interrupt if the RUA1L bit is set

and the bit in GL.ISRIE.PSRIE[4:1] that corresponds to this port is set.

0 = interrupt disabled

1 = interrupt enabled

Bit 7: Out Of Multi-frame Interrupt Enable (OOMFIE) – This bit enables an interrupt if the OOMFL bit is set and

the bit in GL.ISRIE.PSRIE[4:1] that corresponds to this port is set.

0 = interrupt disabled

1 = interrupt enabled

Bit 6: Severely Errored Frame Interrupt Enable (SEFIE) – This bit enables an interrupt if the SEFL bit is set and

the bit in GL.ISRIE.PSRIE[4:1] that corresponds to this port is set.

0 = interrupt disabled

1 = interrupt enabled

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