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VR4102 Datasheet(PDF) 26 Page - NEC

Part # VR4102
Description  64/32-bit Microprocessor
PDF  701 Pages
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Manufacturer  NEC [NEC]
Direct Link  http://www.nec.com/
Logo NEC - NEC

VR4102 Datasheet(HTML) 26 Page - NEC

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LIST OF TABLES (3/4)
Table. No.
Title
Page
10-7
Illegal Access Notification Methods .......................................................................................................
251
10-8
Access Times during Ordinary ROM Read Mode ..................................................................................
252
10-9
PageROM Read Mode Access Time .....................................................................................................
254
10-10
System Bus Access Times ....................................................................................................................
256
10-11
High-Speed System Bus Access Times ................................................................................................
260
10-12
Access Times for LCD Interface ............................................................................................................
263
11-1
DMAAU Registers ..................................................................................................................................
272
12-1
DMA Priority Levels ...............................................................................................................................
281
12-2
DCU Registers .......................................................................................................................................
281
13-1
CMU Register ........................................................................................................................................
289
14-1
ICU Registers.........................................................................................................................................
294
15-1
Bit Operations during Reset...................................................................................................................
319
15-2
Bit Operations during Shutdown ............................................................................................................
320
15-3
Power Mode...........................................................................................................................................
326
15-4
PMU Registers.......................................................................................................................................
327
16-1
RTC Registers .......................................................................................................................................
336
17-1
DSU Registers .......................................................................................................................................
355
18-1
GPIO Pin Functions ...............................................................................................................................
361
18-2
GIU Registers ........................................................................................................................................
362
18-3
Table of Correspondences between GPIO[47..32] and Function Pins ..................................................
379
18-4
Table of Correspondence between GPIO[48] and Function Pin ............................................................
380
19-1
PIU Registers.........................................................................................................................................
386
19-2
PIUCNTREG Bit Manipulation and States .............................................................................................
389
19-3
PIUASCNREG Bit Manipulation and States...........................................................................................
396
19-4
Detected Coordinates and Page Buffers ...............................................................................................
399
19-5
A/D Ports and Data Buffers....................................................................................................................
400
19-6
Comparison of PIUs of VR4102 and VR4101..........................................................................................
407
20-1
AIU Registers.........................................................................................................................................
409
21-1
KIU Registers.........................................................................................................................................
423
22-1
DSIU Registers ......................................................................................................................................
435
22-2
Receive Error Causes............................................................................................................................
452



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