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VR4102 Datasheet(PDF) 76 Page - NEC |
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VR4102 Datasheet(HTML) 76 Page - NEC |
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76 / 701 page ![]() CHAPTER 2 PIN FUNCTIONS 76 2.3.2 Connection of Unused Pins and Pin I/O Circuits Table 2-16. Connection of Unused Pins and Pin I/O Circuit Type (1/3) Signal Internal processing External processing Drive capability I/O circuit type ADD[25..0] ðð 120 pF A DATA[15..0] ðð 40 pF A DATA[31..16]/ GPIO[31..16] ðð / Pull up Pull down 40 pF A LCDCS# ðð 40 pF A RD# ð Note 1 120 pF A WR# ð Note 1 120 pF A LCDRDY ð Pull up ð A ROMCS[3..0]# ðð 40 pF A UUCAS#/MRAS[3]# ð Note 1 40 pF A ULCAS#/MRAS[2]# ð Note 1 40 pF A MRAS[1..0]# ð Note 1 40 pF A UCAS# ð Note 1 40 pF A LCAS# ð Note 1 40 pF A BUSCLK ðð 40 pF A SHB# ð Note 1 40 pF A IOR# ð Note 1 40 pF A IOW# ð Note 1 40 pF A MEMR# ð Note 1 40 pF A MEMW# ð Note 1 40 pF A ZWS# Note 2 Pull up ð A RSTOUT ð Pull up 40 pF A IOCS16# Note 2 Pull up ð A MEMCS16# Note 2 Pull up ð A IOCHRDY Note 2 Pull up ð A Notes 1. Pull up when the bus hold function is used. 2. Intermediate-level input is enabled when the MPOWER pin is set for low-level output. |
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