VR4102 datasheet(61/701 Pages) NEC

61 / 701 page

CHAPTER 2 PIN FUNCTIONS

PIN IDENTIFICATION

ADD [0:25]

: Address Bus

IRDOUT#

: IrDA Data Output

ADIN [0:2]

: General Purpose Input for A/D

IRING

: Input Ring

AFERST#

: AFE Reset

KPORT [0:7]

: Key Code Data Input

AGND

: GND for A/D

KSCAN [0:11]

: Key Scan Line

AUDIOIN

: Audio Input

LCAS#

: Lower Column Address Strobe

AUDIOOUT

: Audio Output

LCDCS#

: LCD Chip Select

AVDD

: VDD for A/D

LCDRDY

: LCD Ready

BATTINH

: Battery Inhibit

LEDOUT#

: LED Output

BATTINT#

: Battery Interrupt Request

MEMCS16#

: Memory Chip Select 16

BUSCLK

: System Bus Clock

MEMR#

: Memory Read

CGND

: GND for Oscillator

MEMW#

: Memory Write

CLKSEL [0:2]

: Clock Select

MPOWER

: Main Power

CLKX1

: Clock X1

MRAS [0:3]#

: DRAM Row Address Strobe

CLKX2

: Clock X2

MUTE

: Mute

CTS#

: Clear to Send

OFFHOOK

: Off Hook

CVDD

: VDD for Oscillator

OPD#

: Output Power Down

DATA [0:31]

: Data Bus

PIUGND

: GND for Touch Panel Interface

DBUS32

: Data Bus 32

PIUVDD

: VDD for Touch Panel Interface

DCD#

: Data Carrier Detect

POWER

: Power Switch

DCTS#

: Debug Serial Clear to Send

POWERON

: Power On State

DDIN

: Debug Serial Data Input

RD#

: Read

DDOUT

: Debug Serial Data Output

ROMCS [0:3]#

: ROM Chip Select

DGND

: GND for D/A

RSTOUT

: System Bus Reset Output

DRTS#

: Debug Serial Request to Send

RSTSW#

: Reset Switch

DSR#

: Data Set Ready

RTCRST#

: Real-time Clock Reset

DTR#

: Data Terminal Ready

RTCX1

: Real-time Clock X1

DVDD

: VDD for D/A

RTCX2

: Real-time Clock X2

FIRCLK

: FIR Clock

RTS#

: Request to Send

FIRDIN#

: FIR Data Input

RxD

: Receive Data

: Frame Synchronization

SDI

: HSP Serial Data Input

GND

: Ground

SDO

: HSP Serial Data Output

GNDP

: Ground for PLL

SEL

: IrDA Module Select

GPIO [0:49]

: General Purpose I/O

SHB#

: System Hi-Byte Enable

HC0

: Hardware Control 0

TELCON

: Telephone Control

HLDACK#

: Hold Acknowledge

TPX [0:1]

: Touch Panel X I/O

HLDRQ#

: Hold Request

TPY [0:1]

: Touch Panel Y I/O

HSPMCLK

: HSP Codec Master Clock

TxD

: Transmit Data

HSPSCLK

: HSP Codec Serial Clock

UCAS#

: Upper Column Address Strobe

: Internally Connected

ULCAS#

: Lower Byte of Upper Column

ILCSENSE

: Input Loop Current Sensing

Address Strobe

IOCHRDY

: I/O Channel Ready

UUCAS#

: Upper Byte of Upper Column

IOCS16#

: I/O Chip Select 16

Address Strobe

IOR#

: I/O Read

VDD

: Power Supply Voltage

IOW#

: I/O Write

VDDP: VDD for PLL

IRDIN

: IrDA Data Input

WR#

: Write

ZWS#

: Zero Wait State

Remark # indicates active low.

VR4102 Datasheet(PDF) 61 Page - NEC

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