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SC3200 Datasheet(PDF) 204 Page - Advanced Micro Devices |
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SC3200 Datasheet(HTML) 204 Page - Advanced Micro Devices |
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204 / 447 page  204 AMD Geode™ SC3200 Processor Data Book Core Logic Module - Register Summary Revision 5.1 Table 6-28. ISA Legacy I/O Register Summary I/O Port Type Name Reference DMA Channel Control Registers (Table 6-43) 000h R/W DMA Channel 0 Address Register Page 313 001h R/W DMA Channel 0 Transfer Count Register Page 313 002h R/W DMA Channel 1 Address Register Page 313 003h R/W DMA Channel 1 Transfer Count Register Page 313 004h R/W DMA Channel 2 Address Register Page 313 005h R/W DMA Channel 2 Transfer Count Register Page 313 006h R/W DMA Channel 3 Address Register Page 313 007h R/W DMA Channel 3 Transfer Count Register Page 313 008h Read DMA Status Register, Channels 3:0 Page 313 Write DMA Command Register, Channels 3:0 Page 314 009h WO Software DMA Request Register, Channels 3:0 Page 314 00Ah W DMA Channel Mask Register, Channels 3:0 Page 314 00Bh WO DMA Channel Mode Register, Channels 3:0 Page 315 00Ch WO DMA Clear Byte Pointer Command, Channels 3:0 Page 315 00Dh WO DMA Master Clear Command, Channels 3:0 Page 315 00Eh WO DMA Clear Mask Register Command, Channels 3:0 Page 315 00Fh WO DMA Write Mask Register Command, Channels 3:0 Page 315 0C0h R/W DMA Channel 4 Address Register (Not used) Page 315 0C2h R/W DMA Channel 4 Transfer Count Register (Not Used) Page 315 0C4h R/W DMA Channel 5 Address Register Page 315 0C6h R/W DMA Channel 5 Transfer Count Register Page 315 0C8h R/W DMA Channel 6 Address Register Page 315 0CAh R/W DMA Channel 6 Transfer Count Register Page 315 0CCh R/W DMA Channel 7 Address Register Page 315 0CEh R/W DMA Channel 7 Transfer Count Register Page 315 0D0h Read DMA Status Register, Channels 7:4 Page 316 Write DMA Command Register, Channels 7:4 Page 316 0D2h WO Software DMA Request Register, Channels 7:4 Page 317 0D4h W DMA Channel Mask Register, Channels 7:4 Page 317 0D6h WO DMA Channel Mode Register, Channels 7:4 Page 317 0D8h WO DMA Clear Byte Pointer Command, Channels 7:4 Page 317 0DAh WO DMA Master Clear Command, Channels 7:4 Page 317 0DCh WO DMA Clear Mask Register Command, Channels 7:4 Page 317 0DEh WO DMA Write Mask Register Command, Channels 7:4 Page 318 DMA Page Registers (Table 6-44) 081h R/W DMA Channel 2 Low Page Register Page 318 082h R/W DMA Channel 3 Low Page Register Page 318 083h R/W DMA Channel 1 Low Page Register Page 318 087h R/W DMA Channel 0 Low Page Register Page 318 089h R/W DMA Channel 6 Low Page Register Page 318 08Ah R/W DMA Channel 7 Low Page Register Page 318 08Bh R/W DMA Channel 5 Low Page Register Page 318 08Fh R/W Sub-ISA Refresh Low Page Register Page 318 481h R/W DMA Channel 2 High Page Register Page 318 482h R/W DMA Channel 3 High Page Register Page 318 483h R/W DMA Channel 1 High Page Register Page 318 |
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