Electronic Components Datasheet Search
  English  ▼

X  

SC3200 Datasheet(PDF) 395 Page - Advanced Micro Devices

Part # SC3200
Description  AMD GEODE-TM SC3200 PROCESSOR
PDF  447 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

SC3200 Datasheet(HTML) 395 Page - Advanced Micro Devices

Back Button SC3200 Datasheet HTML 391Page - Advanced Micro Devices SC3200 Datasheet HTML 392Page - Advanced Micro Devices SC3200 Datasheet HTML 393Page - Advanced Micro Devices SC3200 Datasheet HTML 394Page - Advanced Micro Devices SC3200 Datasheet HTML 395Page - Advanced Micro Devices SC3200 Datasheet HTML 396Page - Advanced Micro Devices SC3200 Datasheet HTML 397Page - Advanced Micro Devices SC3200 Datasheet HTML 398Page - Advanced Micro Devices SC3200 Datasheet HTML 399Page - Advanced Micro Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 395 / 447 page
background image
AMD Geode™ SC3200 Processor Data Book
395
Electrical Specifications
Revision 5.1
9.3.6
Sub-ISA Interface
All output timing is guaranteed for 50 pF load, unless other-
wise specified.
The ISA Clock divisor (defined in F0 Index 50h[2:0] of the
Core Logic module) is 011.
Table 9-21. Sub-ISA Timing Parameters
Symbol
Parameter
Bus
Width
(Bits)
Type
Min
(ns)
Max
(ns)
Figure
Comments
tRD1
MEMR#/DOCR#/RD#/TRDE# read
active pulse width FE to RE
16
M
225
9-19
Standard
tRD2
MEMR#/DOCR#/RD#/TRDE# read
active pulse width FE to RE
16
M
105
9-19
Zero wait state
tRD3
IOR#/RD#/TRDE# read active pulse
width FE to RE
16
I/O
160
9-19
Standard
tRD4
IOR#/MEMR#/DOCR#/RD#/TRDE#
read active pulse width FE to RE
8
M, I/O
520
9-19
Standard
tRD5
IOR#/MEMR#/DOCR#/RD#/TRDE#
read active pulse width FE to RE
8
M, I/O
160
9-19
Zero wait state
tRCU1
MEMR#/DOCR#/RD#/TRDE#
inactive pulse width
16
M
103
9-19
tRCU2
MEMR#/DOCR#/RD#/TRDE#
inactive pulse width
8M
163
9-19
tRCU3
IOR#/RD#/TRDE# inactive pulse
width
8, 16
I/O
163
9-19
tWR1
MEMW#/WR# write active pulse
width FE to RE
16
M
225
9-20
Standard
tWR2
MEMW#/DOCW#/WR# write active
pulse width FE to RE
16
M
105
9-20
Zero wait state
tWR3
IOW#/WR# write active pulse width
FE to RE
16
I/O
160
9-20
Standard
tWR4
IOW#/MEMW#/DOCW#/WR# write
active pulse width FE to RE
8
M, I/O
520
9-20
Standard
tWR5
IOW#/MEMW#/DOCW#/WR# write
active pulse width FE to RE
8
M, I/O
160
9-20
Zero wait state
tWCU1
MEMW#/WR#/DOCW# inactive pulse
width
16
M
103
9-20
tWCU2
MEMW#/WR#/DOCW# inactive pulse
width
8M
163
9-20
tWCU3
IOW#/WR# inactive pulse width
8, 16
I/O
163
9-20
tRDYH
IOR#/MEMR#/RD#/DOCR#/IOW#/
MEMW#/WR#/DOCW# hold after
IOCHRDY RE
8, 16
M, I/O
120
9-19
9-20
tRDYA1
IOCHRDY valid after IOR#/MEMR#/
RD#/DOCR#/IOW#/MEMW#/WR#/
DOCW# FE
16
M, I/O
78
9-19
9-20



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com