ATXP032 datasheet(60/113 Pages) DIALOG

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ATXP032

DS-ATXP032–114I–4-2020

The EPE bit state is undefined after Ultra-Deep Power-Down (79h) command, if exit from UDPD is done with

JEDEC Standard Hardware Reset (In-Band Reset) or Hardware Reset.

The EPE bit is always cleared when power is cycled.

The effect on the EPE bit as a result of various operations is summarized in Table 12-4 below.

Note: Even though EPE is a volatile bit, it is not cleared when the device is entering Auto Ultra-Deep Power-Down.

This to ensure that the error can still be detected after an Auto Ultra-Deep Power-Down Program or Erase

operation.In this case, it will not be erased by a JEDEC Hardware Reset or by exercising the RESET pin. However,

it will be erased by a full power cycle.

Note also that the EPE bit is not set if a hardware reset (RESET pin or JEDEC hardware reset) occurs or a

Terminate (F0h) command is issued during a program or erase operation, even though the operation is terminated

and it is likely that the program or erase operation will not be successful.

If a Reset (Terminate Operation, F0h) command is issued while a program or erase operation is actually in

progress, the EPE bit is not updated.

Upon recovery from ultra-deep power-down, all internal volatile registers default to their power-on default state,

except for the EPE bit in Status/Control Register Byte 1 in the following case: Even though EPE is a volatile bit, it is

not cleared when the device is entering auto-ultra-deep power-down. This is to ensure that an error can still be

detected after an auto ultra-deep power-down program or erase operation. In this case, the EPE bit is not erased

by a JEDEC hardware reset or by exercising the RESET pin. However, it is erased by a full power cycle, or if the

Ultra-Deep Power-Down (79h) command was used to enter UDPD.

12.1.4 UDPDS Bit

The UDPDS bit is used to detect if the device is in ultra-deep dower-down mode or not. This bit reads 1 if in UDPD,

0 in any other mode.

12.1.5 SWP Bits

The SWP bits provide feedback on the software protection status for the device. There are three possible

combinations of the SWP bits that indicate whether none, some, or all of the sectors have been protected using the

Protect Sector command or the global protect feature. If the SWP bits indicate that some of the sectors have been

Table 12-4.

Effect on the EPE bit as a Result of Various Operations

Action

Effect on EPE bit

Power Cycle

Cleared

After Program/Erase

Valid value

JEDEC Standard Hardware Reset (In-Band Reset) or Hardware Reset while in Auto Deep Power-

Down Mode after a Program or Erase Operation

Valid value

JEDEC Standard Hardware Reset (In-Band Reset) or Hardware Reset while in Ultra-Deep Power-

Down mode (after

Ultra-Deep Power-Down (79h) command)

Undefined (1)

JEDEC Standard Hardware Reset (In-Band Reset) , Hardware Reset (not in AUDPD or UDPD)

Undefined (2)

Terminate (F0h) while a Program or Erase operation is in progress

Undefined(2) (3)

If the AUDPD feature is not used, the EPE bit will be cleared upon exit from UDPD

If any reset sequence or command is used to interrupt/terminate a Program or Erase operation in progress, the EPE bit is not set

If a Reset (Terminate Operation, F0h) command is issued while a Program or Erase operation is actually in progress, the EPE bit will not be updated.

ATXP032 Datasheet(PDF) 60 Page - Dialog Semiconductor

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