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ATXP032 Datasheet(PDF) 82 Page - Dialog Semiconductor |
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ATXP032 Datasheet(HTML) 82 Page - Dialog Semiconductor |
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82 / 113 page ![]() 80 ATXP032 DS-ATXP032–114I–4-2020 Figure 13-7. Resume from Deep Power-Down in Octal Mode — DDR 13.5 Ultra-Deep Power-Down (79h) The ultra-deep power-down mode allows the device to further reduce its energy consumption compared to the existing standby and deep power-down modes by shutting down additional internal circuitry. When the device is in the ultra-deep power-down mode, the Read Status Register Byte 1 (05h) command is the only command that the device recognizes. When reading the Status/Control registers in this mode, all bits are read as “1”, indicating that the device is in UDPD mode. All other commands, including the Resume from Deep Power-Down or Ultra-Deep Power-Down (ABh) commands, are ignored. Since all write commands are ignored, the mode can be used as an extra protection mechanism against inadvertent or unintentional program and erase operations. Entering the ultra-deep power-down mode is accomplished by simply asserting the CS pin, clocking in the command 79h, and then deasserting the CS pin. Any additional data clocked into the device after the command is ignored. When the CS pin is deasserted, the device enters the ultra-deep power-down mode within the maximum time of t EUDPD. The complete command must be clocked in before the CS pin is deasserted; otherwise, the device aborts the operation and returns to the standby mode once the CS pin is deasserted. In addition, the device defaults to the standby mode after a power cycle. The Ultra-Deep Power-Down command is ignored if an internally self-timed operation such as a program or erase cycle is in progress. All input pins have to be at valid CMOS levels to minimize power consumption in ultra-deep power-down mode. Upon recovery from ultra-deep power-down mode, all internal registers except the EPE bit in Status/Control Register Byte 1 are in the power-on default state. See the description in Section 12.1.3, EPE Bit for details of what values EPE may have upon recovery from ultra-deep power-down. The device wakes up in SPI mode even if it was in octal mode when it entered the ultra-deep power-down state. t RDPD ICC Deep Power Mode Current Standby Mode Current Active Current ABh Opcode 0 I/O7-0 SCK CS DS |
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