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ATXP032 Datasheet(PDF) 93 Page - Dialog Semiconductor |
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ATXP032 Datasheet(HTML) 93 Page - Dialog Semiconductor |
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93 / 113 page ![]() 91 ATXP032 DS-ATXP032–114I–4-2020 Note also that in DDR mode, the SFDP command can only be used for addressing data on a 32-bit (4-byte) boundary. (Address bits A 1 and A0 both have to be 0). After the three address bytes and the dummy cycles have been clocked in, additional clock cycles will result in data being output on the I/O pin(s). The data is always output with the MSB of a byte first. When the last byte (0000FFh) of the SFDP security register has been read, the device continues reading back at the beginning of the register (000000h). No delays are incurred when wrapping around from the end of the register to the beginning of the register. Deasserting the CS pin terminates the read operation and places the I/O pin(s) into a high-impedance state. The CS pin can be deasserted at any time and does not require that a full byte of data be read. The format of the SFDP register follows the format provided in JEDEC Standard No. 216 Rev D. Figure 13-24. Read SFDP Figure 13-25. Read SFDP in Octal Mode — SDR D D D D D D D D X X X X X X X X A A A A A A A A MSB MSB LSB MSB 0 1 0 1 1 0 1 0 Output Data Byte 1 8 Dummy Cycles Address Bits A 23-A0 Opcode DS 2 3 1 0 6 7 5 4 10 11 9 8 29 30 12 33 34 32 31 37 38 36 35 41 42 40 39 45 46 44 43 SI SCK SO CS Byte1 Byte2 Output Data 8 Dummy Cycles A23-16 A15-8 A7-0 Address 5Ah Opcode 2 3 1 0 4 7 8 6 5 9 12 11 10 I/O7-0 SCK CS DS |
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