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MMPF0100 Datasheet(PDF) 55 Page - NXP Semiconductors |
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MMPF0100 Datasheet(HTML) 55 Page - NXP Semiconductors |
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55 / 136 page ![]() NXP Semiconductors 55 PF0100 FUNCTIONAL BLOCK REQUIREMENTS AND BEHAVIORS Table 58. Register SW2STBY - ADDR 0x36 Name Bit # R/W Default Description SW2STBY 5:0 R/W 0x00 Sets the SW2 output voltage during standby mode. See Table 55 for all possible configurations. SW2STBY 6 R 0x00 Sets the operating output voltage range for SW2 on standby mode. This bit inherits the value configured on bit SW2[6] during OTP or TBB configuration. See Table 55 for all possible configurations. UNUSED 7 – 0x00 unused Table 59. Register SW2OFF - ADDR 0x37 Name Bit # R/W Default Description SW2OFF 5:0 R/W 0x00 Sets the SW2 output voltage during sleep mode. See Table 55 for all possible configurations. SW2OFF 6 R 0x00 Sets the operating output voltage range for SW2 on sleep mode. This bit inherits the value configured on bit SW2[6] during OTP or TBB configuration. See Table 55 for all possible configurations. UNUSED 7 – 0x00 unused Table 60. Register SW2MODE - ADDR 0x38 Name Bit # R/W Default Description SW2MODE 3:0 R/W 0x08 Sets the SW2 switching operation mode. See Table 30 for all possible configurations. UNUSED 4 – 0x00 unused SW2OMODE 5 R/W 0x00 Set status of SW2 when in sleep mode • 0 = OFF • 1 = PFM UNUSED 7:6 – 0x00 unused Table 61. Register SW2CONF - ADDR 0x39 Name Bit # R/W Default Description SW2ILIM 0 R/W 0x00 SW2 current limit level selection (48) • 0 = High level current limit • 1 = Low level current limit UNUSED 1 R/W 0x00 unused SW2FREQ 3:2 R/W 0x00 SW2 switching frequency selector. See Table 38. SW2PHASE 5:4 R/W 0x00 SW2 phase clock selection. See Table 36. SW2DVSSPEED 7:6 R/W 0x00 SW2 DVS speed selection. See Table 35. Notes 48. SW2ILIM = 0 must be used in NP/F9/FA versions (Industrial only) if 2.5 A output load current is desired |
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