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MMPF0100 Datasheet(PDF) 60 Page - NXP Semiconductors |
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MMPF0100 Datasheet(HTML) 60 Page - NXP Semiconductors |
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60 / 136 page  60 NXP Semiconductors PF0100 FUNCTIONAL BLOCK REQUIREMENTS AND BEHAVIORS 6.4.4.4.6 SW3A/B dual phase SW3A/B can be connected in dual phase configuration using one inductor per switching node, as shown in Figure 22. This mode allows a smaller output voltage ripple. Feedback is taken from pin SW3AFB and pin SW3BFB must be left open. Although control is from SW3A, registers of both regulators, SW3A and SW3B, must be identically set. In this configuration, the regulators switch 180 degrees apart. Figure 22. SW3A/B dual phase block diagram Driver Controller EA Z1 Z2 Internal Compensation SW3AIN SW3ALX SW3AFB ISENSE COSW3A CINSW3A LSW3A I2C Interface SW3 SW3AMODE SW3AFAULT VREF DAC I2C VIN Driver Controller SW3BIN SW3BLX ISENSE COSW3B CINSW3B LSW3B EP SW3BMODE SW3BFAULT VIN EA Z1 Z2 Internal Compensation VREF DAC I2C SW3BFB |
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