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MMPF0100 Datasheet(PDF) 59 Page - NXP Semiconductors |
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MMPF0100 Datasheet(HTML) 59 Page - NXP Semiconductors |
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59 / 136 page  NXP Semiconductors 59 PF0100 FUNCTIONAL BLOCK REQUIREMENTS AND BEHAVIORS 6.4.4.4.5 SW3A/B single phase In this configuration, SW3ALX and SW3BLX are connected in single phase with a single inductor a shown in Figure 21. This configuration reduces cost and component count. Feedback is taken from the SW3AFB pin and the SW3BFB pin must be left open. Although control is from SW3A, registers of both regulators, SW3A and SW3B, must be identically set. Figure 21. SW3A/B single phase block diagram Table 64. SW3 configuration SW3_CONFIG[1:0] Description 00 A/B single phase 01 A/B single phase 10 A/B dual phase 11 A/B independent Driver Controller SW3AIN SW3ALX SW3AFB ISENSE COSW3A CINSW3A LSW3A I2C Interface SW3 SW3AMODE SW3AFAULT VIN Driver Controller SW3BIN SW3BLX ISENSE CINSW3B EP SW3BMODE SW3BFAULT VIN EA Z1 Z2 Internal Compensation VREF DAC I2C EA Z1 Z2 Internal Compensation VREF DAC I2C SW3BFB |
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