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MMPF0100 Datasheet(PDF) 81 Page - NXP Semiconductors

Part # MMPF0100
Description  14 channel configurable power management integrated circuit
PDF  136 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

MMPF0100 Datasheet(HTML) 81 Page - NXP Semiconductors

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NXP Semiconductors
81
PF0100
FUNCTIONAL BLOCK REQUIREMENTS AND BEHAVIORS
6.4.6.2
Short-circuit protection
All general purpose LDOs have short-circuit protection capability. The short-circuit protection (SCP) system includes debounced fault
condition detection, regulator shutdown, and processor interrupt generation, to contain failures and minimize the chance of product
damage. If a short-circuit condition is detected, the LDO is disabled by resetting its VGENxEN bit, while at the same time, an interrupt
VGENxFAULTI is generated to flag the fault to the system processor. The VGENxFAULTI interrupt is maskable through the
VGENxFAULTM mask bit.
The SCP feature is enabled by setting the REGSCPEN bit. If this bit is not set, the regulators do not automatically disable upon a short-
circuit detection. However, the current limiter continues to limit the output current of the regulator. By default, the REGSCPEN is not set;
therefore, at start-up none of the regulators is disabled if an overloaded condition occurs. A fault interrupt, VGENxFAULTI, is generated
in an overload condition regardless of the state of the REGSCPEN bit. See Table 91 for SCP behavior configuration.
6.4.6.3
LDO regulator control
Each LDO is fully controlled through its respective VGENxCTL register. This register enables the user to set the LDO output voltage
according to Table 92 for VGEN1 and VGEN2; and uses the voltage set point on Table 93 for VGEN3 through VGEN6.
Table 91. Short-circuit behavior
REGSCPEN[0]
Short-circuit behavior
0
Current limit
1
Shutdown
Table 92. VGEN1, VGEN2 output voltage configuration
Set point
VGENx[3:0]
VGENx output (V)
0
0000
0.800
1
0001
0.850
2
0010
0.900
3
0011
0.950
4
0100
1.000
5
0101
1.050
6
0110
1.100
7
0111
1.150
8
1000
1.200
9
1001
1.250
10
1010
1.300
11
1011
1.350
12
1100
1.400
13
1101
1.450
14
1110
1.500
15
1111
1.550
Table 93. VGEN3/ 4/ 5/ 6 output voltage configuration
Set point
VGENx[3:0]
VGENx output (V)
00000
1.80
10001
1.90
20010
2.00



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