MMPF0100 datasheet(96/136 Pages) NXP

96 / 136 page

NXP Semiconductors

PF0100

FUNCTIONAL BLOCK REQUIREMENTS AND BEHAVIORS

6.4.7.0.1

VSNVS control

The VSNVS output level is configured through the VSNVSVOLT[2:0]bits on VSNVSCTL register as shown in Table 109.

6.4.7.0.2

VSNVS external components

6.4.7.0.3

VSNVS specifications

Table 108. VSNVS modes of operation

VSNVSVOLT[2:0]

VIN

Mode

110

> VTH1

VIN LDO 3.0 V

110

< VTL1

Coin cell switch

000 – 101

> VTH0

VIN LDO

000 – 101

< VTL0

Coin cell LDO

Table 109. Register VSNVSCTL - ADDR 0x6B

Name

Bit #

R/W

Default

Description

VSNVSVOLT

2:0

R/W

0x80

Configures VSNVS output voltage.(76)

• 000 = 1.0 V

• 001 = 1.1 V

• 010 = 1.2 V

• 011 = 1.3 V

• 100 = 1.5 V

• 101 = 1.8 V

• 110 = 3.0 V

• 111 = RSVD

UNUSED

7:3

–

0x00

unused

Notes

76.

Only valid when a valid input voltage is present.

Table 110. VSNVS external components

Capacitor

Value (

μF)

VSNVS

0.47

Table 111. VSNVS electrical characteristics

All parameters are specified at TMIN to TMAX (See Table 3), VIN = 3.6 V, VSNVS = 3.0 V, ISNVS = 5.0 μA, typical external component values,

unless otherwise noted. Typical values are characterized at VIN = 3.6 V, VSNVS = 3.0 V, ISNVS = 5.0 μA, and 25 °C, unless otherwise

noted.

Symbol

Parameter

Min

Typ

Max

Unit

Notes

VSNVS

VINSNVS

Operating Input Voltage

• Valid coin cell range

• Valid VIN

1.8

2.25

–

3.3

4.5

ISNVS

Operating load current

• VINMIN < VIN < VINMAX

5.0

–

400

μA

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