W5300 datasheet(66/128 Pages) WIZNET

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P0_BRDYR (PIN "BRDY0" Configure Register) [R/W] [0x08060/0x060] [0x--00]

It configures PIN "BRDY0".

P1_BRDYR (PIN "BRDY1" Configure Register) [R/W] [0x08064/0x064] [0x--00]

It configures PIN "BRDY1".

P2_BRDYR (PIN "BRDY2" Configure Register) [R/W] [0x08068/0x068] [0x--00]

It configures PIN "BRDY2".

P3_BRDYR (PIN "BRDY3" Configure Register) [R/W] [0x0806C/0x06C] [0x--00]

It configures PIN "BRDY3".

Pn_BDPTHR (PIN "BRDYn" Buffer Depth Register) [R/W] [0x08062/0x062] [0xUUUU]

It configures buffer depth of PIN "BRDYn". When monitoring TX memory and Sn_TX_FSR is

same or bigger than Pn_DPTHR, the PIN "BRDYn" is signaled. When monitoring RX memory

and

if Sn_RX_RSR is same or bigger than Pn_BDPTHR, PIN "BRDYn" is signaled. The value

for Pn_BDPTHR can't exceed TX/RX memory size allocated by TMSR or RMSR.

P0_BDPTHR (PIN "BRDY0" Buffer Depth Register) [R/W] [0x08062/0x062] [0xUUUU]

Sets buffer depth of PIN "BRDY0".

P1_BDPTHR (PIN "BRDY1" Buffer Depth Register) [R/W] [0x08066/0x066] [0xUUUU]

Sets buffer depth of PIN "BRDY1".

P2_BDPTHR (PIN "BRDY2" Buffer Depth Register) [R/W] [0x0806A/0x06A] [0xUUUU]

Sets buffer depth of PIN "BRDY2".

P3_BDPTHR (PIN "BRDY3" Buffer Depth Register) [R/W] [0x0806E/0x06E] [0xUUUU]

Sets buffer depth of PIN "BRDY3".

Ex) When monitoring if the free size of SOCKET5 TX memory is 2048 through PIN "BRDY3"

with high sensitive,

P3_BRDYR = 0x00E5

P3_BRDYR(0x0806C/0x06C)

P3_BRDYR0(0x0806C/0x06C)

P3_BRDYR1(0x0806D/0x06D)

Reserved

0xE5

W5300 Datasheet(PDF) 66 Page - WIZnet Co., Ltd