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W5300 Datasheet(PDF) 25 Page - WIZnet Co., Ltd |
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W5300 Datasheet(HTML) 25 Page - WIZnet Co., Ltd |
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25 / 128 page  © Copyright 2008-2014 WIZnet Co.,Ltd. All rights reserved. 25 Target Host System Memory- Mapped I/O Space (T.M.S) BA + 0x000 MR (Mode Reg) Mode Register BA + 0x002 IR (Interrupt Reg) BA + 0x004 IMR (Interrupt Mask Reg) . Common Registers . BA + 0x0FE IDR (ID Reg) BA + 0x100 Reserved BA + 0x1FE BA + 0x200 S0_MR (SOCKET0 Mode Reg) BA + 0x240 S1_MR BA + 0x280 S2_MR BA + 0x2C0 S3_MR SOCKET Registers BA + 0x300 S4_MR BA + 0x340 S5_MR BA + 0x380 S6_MR BA + 0x3C0 S7_MR BA + 0x3FF Direct Address Mode (MR (0) = ‘0’) BA + 0x000 MR 0x000 Reserved W5300 Internal Memory- Mapped Space (W.M.S) T.M.S BA + 0x002 IDM_AR 0x002 IR BA + 0x004 IDM_DR 0x004 IMR … 0x0FE IDR 0x100 Reserved 0x1FE 0x200 S0_MR 0x240 S1_MR 0x280 S2_MR 0x2C0 S3_MR 0x300 S4_MR 0x340 S5_MR 0x380 S6_MR 0x3C0 S7_MR 0x3FF Indirect Addr ess Mode (MR(0) = ‘1’) Fig 3. Memory Map |
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