| Electronic Components Datasheet Search |
|
LT4293 Datasheet(PDF) 5 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
LT4293 Datasheet(HTML) 5 Page - Analog Devices |
|
5 / 44 page ![]() LTC9101-2/LTC9102 5 Rev. 0 For more information www.analog.com ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. AGND – VEE = 55V and VDD – DGND = 3.3V unless otherwise noted. (Notes 3 and 4) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Digital Interface VILD Digital Input Low Voltage ADn, RESET, OSS, CFGn (Note 6) l 0.8 V I2C Input Low Voltage SCL, SDAIN (Note 6) l 1 V VIHD Digital Input High Voltage (Note 6) l 2.2 V Digital Output Low Voltage ISDAOUT = 3mA, IINT = 3mA ISDAOUT = 5mA, IINT = 5mA l l 0.4 0.7 V V Internal Pull-Up to VDD ADn, RESET, OSS 50 kΩ Internal Pull-Down to DGND CFG0 50 kΩ EXT3 Pull-Down to VEE 50 kΩ IDn Internal Pull-Up to CAP4 IDn = 0V 5 μA PSE Timing Characteristics (Note 7) tDET Detection Time Beginning to End of Detection l 380 500 ms tCLASS_RESET Classification Reset Duration l 15 ms tCEV Class Event Duration l 6 15 20 ms tCEVON Class Event Turn On Duration CPORT = 0.6µF l 0.1 ms tLCE Long Class Event Duration l 88 105 ms tCLASS Class Event ICLASS Measurement Timing l 6 ms tCLASS_LCE Long Class Event ICLASS Measurement Timing l 6 75 ms tCLASS_ACS Autoclass ICLASS Measurement Timing l 88 105 ms tME1 Mark Event Duration (Except Last Mark Event) (Note 11) l 6 9.6 12 ms tME2 Last Mark Event Duration (Note 11) l 6 20 ms tPON Power On Delay, Auto Mode From End of Valid Detect to End of Valid Inrush (Note 14) l 400 ms tAUTO_PSE1 Autoclass Power Measurement Start From End of Inrush to Beginning of Autoclass Power Measurement l 1.4 1.6 s tAUTO_PSE2 Autoclass Power Measurement End From End of Inrush to End of Autoclass Power Measurement l 3.1 3.5 s tAUTO_WINDOW Autoclass Average Power Sliding Window l 0.15 0.23 0.3 s tED Fault Delay From Power On Fault to Next Detect l 1.0 1.3 1.8 s tSTART Maximum Current Limit Duration During Inrush l 50 60 75 ms tLIM Maximum Current Limit Duration After Inrush (Note 12) Type 1, tLIMn = 0x0 Spare, tLIMn = 0x1 (Type 3/4 Chip Set) Type 2 and 3, tLIMn = 0x2 Type 4, tLIMn = 0x3 50 15 10 6 15 11 22 17 ms ms ms ms tMPS Maintain Power Signature (MPS) Pulse Width Sensitivity Current Pulse Width to Reset Disconnect Timer (Note 8) l 6 ms tDIS Maintain Power Signature (MPS) Dropout Time (Note 5) l 320 370 400 ms tBIT Bit Duration l 24 25 26 μs tOSS-OFF Shutdown Priority Delay l 6.5 10 μs tr_OSS OSS Rise Time l 1 300 ns tf_OSS OSS Fall Time l 1 300 ns tOSS_IDL OSS Idle Time 50 µs |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |