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LT4293 Datasheet(PDF) 18 Page - Analog Devices |
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LT4293 Datasheet(HTML) 18 Page - Analog Devices |
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18 / 44 page ![]() LTC9101-2/LTC9102 18 Rev. 0 For more information www.analog.com To avoid damaging legacy data equipment that does not expect to see DC voltage, the PoE standard defines a protocol that determines when the PSE may apply and remove power. Valid PDs are required to have a specific 25k common-mode resistance at their input. When such a PD is connected to the cable, the PSE detects this sig- nature resistance and applies power. When the PD is later disconnected, the PSE senses the open circuit and removes power. The PSE also removes power in the event of a current fault or short circuit. When a PD is detected, the PSE looks for a classification signature that tells the PSE the maximum power the PD will draw. The PSE can use this information to allocate power among several ports, to police the power con- sumption of the PD, or to reject a PD that will draw more power than the PSE has available. New in 802.3bt The 802.3bt specification introduces several new features: n Type 3 and Type 4 PSEs may provide power over all four pairs (both pairsets), depending on connected PD characteristics. n Type 3 and Type 4 PDs are required to be capable of receiving power over all four pairs (both pairsets). n Type 3 and 4 PDs can be formed as either a single- signature PD or dual-signature PD. A single-signature PD presents the same valid signature resistor to both pairsets simultaneously (see Figure 10). A dual-signa- ture PD presents two fully independent valid detection signatures, one to each pairset (see Figure 11). n Type 3 single-signature PDs request exactly one of six possible power levels: 3.84W, 6.49W, 13W, 25.5W, 40W, or 51W. n Type 3 dual-signature PDs request exactly one of four possible power levels on each pairset: 3.84W, 6.49W, 13W, or 25.5W. The total PD requested power is the sum of the requested power on both pairsets. APPLICATIONS INFORMATION n Type 3 PD Classes overlap with Type 1 and 2 Classes in order to provide additional Type 3 feature sets at lower power levels. n Type 4 single-signature PDs request exactly one of two possible power levels: 62W or 71.3W. n Type 4 dual-signature PDs request exactly 35.6W on at least one pairset and one of five possible power levels on the other pairset: 3.84W, 6.49W, 13W, 25.5W, or 35.6W. The total PD requested power is the sum of the requested power on both pairsets. n Classification is extended to a possible maximum of five class events. The additional events allow for unique identification of existing and new PD Classes. n Type 3 and 4 PSEs issue a long first class event to advertise Type 3 and 4 feature support to attached PDs. n Lower standby power is enabled by shortening the length of the maintain power signature pulse (short MPS). The PD duty cycle drops from ~23% to ~2%. A PD is allowed to present short MPS if the PSE issues a long first class event. n Power management is augmented by Autoclass, an optional feature for 802.3bt PSEs and PDs. In an Autoclass system the maximum PD power is mea- sured and reported to the PSE host, enabling the PSE to reclaim output power not used by the PD applica- tion and losses in the Ethernet cabling (Table 3). See Autoclass section and LTC9101-2NDASI Software Programming documentation for details. Table 3. IEEE-Specified Power Allocations, Single-Signature PD PD CLASS PSE OUTPUT POWER ALLOCATED CABLING LOSS PD INPUT POWER 1 4W 0.16W 3.84W 2 6.7W 0.21W 6.49W 3 14W 1W 13W 4 30W 4.5W 25.5W 5 45W 5W 40W 6 60W 9W 51W 7 75W 13W 62W 8 90W 18.7W 71.3W |
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