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LT4293 Datasheet(PDF) 15 Page - Analog Devices |
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LT4293 Datasheet(HTML) 15 Page - Analog Devices |
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15 / 44 page ![]() LTC9101-2/LTC9102 15 Rev. 0 For more information www.analog.com OVERVIEW Power over Ethernet, or PoE, is a standard protocol for sending DC power over copper Ethernet data wiring. The IEEE group that administers the 802.3 Ethernet data standards added PoE powering capability in 2003. This original PoE standard, known as 802.3af, allowed for 48V DC power at up to 13W. 802.3af was widely popular, but 13W was not adequate for some applications. In 2009, the IEEE released a new standard, known as 802.3at or PoE+, increasing the voltage and current requirements to provide 25.5W of delivered power. IEEE 802.3af and 802.3at are commonly known as PoE 1. In 2018, the IEEE released the latest PoE standard, known as 802.3bt or PoE 2. 802.3bt maximizes PD delivered power at 71.3W. The IEEE standard also defines PoE terminology. A device that provides power to the network is known as a PSE, or power sourcing equipment, while a device that draws power from the network is known as a PD, or powered device. PSEs come in two types: endpoints (typically net- work switches or routers), which provide data and power; and midspans, which provide power but pass through data. Midspans are typically used to add PoE capabil- ity to existing non-PoE networks. PDs are typically IP phones, wireless access points, security cameras, and similar devices. PoE++ Evolution Even during the development of the IEEE 802.3at (PoE 1) 25.5W standard, it became clear there was a significant and increasing need for more than 25.5W of delivered power. In 2013, the 802.3bt task force was formed to develop a standard capable of increasing delivered PD power. The primary objective of the task force is to use all four pairs of the Ethernet cable as opposed to the two pair power utilized by 802.3at. Using all four pairs allows for at least twice the delivered power over existing Ethernet cables. Further, the amount of current per two pairs (known as a pairset) has been increased while maintain- ing the Ethernet data signal integrity. 802.3bt increases PD delivered power from 25.5W to 71.3W, enabling IEEE- compliant high power PD applications. APPLICATIONS INFORMATION The LTC9101-2/LTC9102 delivers power over one or two power channels. Each pairset is driven by a dedicated power channel. In this data sheet, the term “channel” refers to the PSE circuitry assigned to a corresponding pairset. For the purposes of this document, the terms channel and pairset may be considered interchangeable. In addition, IEEE 802.3bt enables substantially lower Maintain Power Signature (MPS) currents, resulting in significantly lower standby power consumption. This allows new and emerging government or industry standby regulations to be met using standard PoE components. LTC9101-2/LTC9102 Product Overview The LTC9101-2/LTC9102 is a sixth generation PSE con- troller that implements up to 24 (71.3W) 4-pair PSE ports in either an endpoint or midspan application. Virtually all necessary circuitry is included to implement an IEEE 802.3bt compliant PSE design, requiring a pair of exter- nal power MOSFETs and sense resistors per port; these minimize power loss compared to alternative designs with onboard MOSFETs, and increase system reliability. The LTC9101-2/LTC9102 chipset implements an optional proprietary isolation scheme for inter-chip communica- tion. This architecture substantially reduces BOM cost by replacing expensive opto-isolators and isolated power supplies with a single low-cost transformer. A single LTC9101-2 is capable of controlling a bus of up to 4 LTC9102s over this transformer-isolated interface. Direct connection of the LTC9101-2 and the associated LTC9102s is also possible. The LTC9101-2/LTC9102 offers a configurable interrupt signal triggered by per-port events, per-channel power on control and fault telemetry, per-port current monitor- ing, VEE monitoring, and one second rolling current, and voltage averaging. The LTC9101-2/LTC9102 also offers advanced sixth-gen- eration PSE features including internal eFlash for storage of firmware updates and custom user configuration pack- ages, 802.3bt-compliant mode, I2C quad virtualization for full backwards-compatibility with quad-based IC drivers, ultralow 100mΩ sense resistors, +80V/–20V tolerant port-facing pins, and improvements to cable surge ride through. |
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