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LT4293 Datasheet(PDF) 21 Page - Analog Devices

Part # LT4293
Description  12/24-Port IEEE 802.3bt PoE PSE Controller
PDF  44 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
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LT4293 Datasheet(HTML) 21 Page - Analog Devices

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LTC9101-2/LTC9102
21
Rev. 0
For more information www.analog.com
APPLICATIONS INFORMATION
Figure 12.
RESISTANCE
PD
PSE
0
10k
15k
9101-2 F12
19k
26.5k
26.25k
23.75k
150 (NIC)
20k
30k
33k
IEEE 802.3 Signature Resistance Ranges
Multipoint Detection
The LTC9101-2/LTC9102 uses a multipoint method to
detect PDs. False-positive detections are minimized by
checking for signature resistance with both forced current
and forced voltage measurements.
Initially, two test currents are forced onto the channel (via
the OUTn pin) and the resulting voltages are measured.
The detection circuitry subtracts the two V-I points to
determine the resistive slope while removing offset caused
by series diodes or leakage at the port (see Figure 13). If
the forced current detection yields a valid signature resis-
tance, two test voltages are then forced onto the channel
and the resulting currents are measured and subtracted.
Both methods must report valid resistances to report a
valid detection. PD signature resistances between 17k
and 29k (typically) are detected as valid and reported as
Detect Valid in the corresponding Detection Status reg-
ister. Values outside this range, including open and short
circuits, are also reported. If the channel measures less
than 1V during any forced current test, the detection cycle
will abort and Short Circuit will be reported. Table 8 shows
the possible detection results.
Detection is always performed on a per-channel basis.
Figure 13.
FIRST
DETECTION
POINT
SECOND
DETECTION
POINT
VALID PD
25k SLOPE
240
160
0V–2V
OFFSET
VOLTAGE
9101-2 F13
PD Detection
Table 8. Detection Status
MEASURED PD
SIGNATURE (TYPICAL) DETECTION RESULT
CONNECTION
CHECK RESULT
Incomplete or Not
Yet Tested
Detect Status Unknown Connection Check
Status Unknown
VPD < 1V
Short-Circuit
Invalid/Fault
CPD > 2.7μF or
VPD > 10V
CPD Too High
Invalid/Fault
RPD < 17k
RSIG too low
Invalid/Fault
17k < RPD < 29k,
Single-Signature PD
Detect Valid
Single-Signature
17k < RPD > 29k,
Dual-Signature PD
Detect Valid
Dual-Signature
RPD > 29k
RSIG Too High
Invalid/Fault
RPD > 50k
Open Circuit
Invalid/Fault
PSE Detected
PSE Detected or Port is
Precharged
Invalid/Fault
MOSFET Fault
MOSFET Fault Detected Invalid/Fault
More on Operating Modes
The port’s operating mode determines when the
LTC9101-2/LTC9102 runs a detection cycle. In manual
mode, the port will idle until the host orders a detect cycle.
It will then run detection, report the result, and return to
idle to wait for another command.
In semi-auto mode the LTC9101-2/LTC9102 autono-
mously polls a port for PDs, but it will not apply power
until commanded to do so by the host. The Detection/
Classification Status registers are updated at the end of
each detection/classification cycle.
In semi-auto mode, if a valid signature resistance is
detected and classification is enabled, the port will clas-
sify the PD and report that result as well. The port will
then wait for at least 100ms, and will repeat the detection
cycle to refresh the data in the Detection/Classification
Status registers.
The port will not turn on in response to a power-on com-
mand unless the current detect result is Detect Valid. Any
other detect result will generate a tSTART fault if a power-on
command is received.
Behavior in Auto mode is similar to semi-auto; however,
after Detect Valid is reported and the port is classified, it
is automatically powered on without host intervention. In



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