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RT600 Datasheet(PDF) 115 Page - NXP Semiconductors

Part # RT600
Description  Dual-core microcontroller with 32-bit Cortex®-M33 and Xtensa HiFi4 Audio DSP CPUs; Up to 4.5 MB SRAM; FlexSPI with cache and dynamic decryption; High-speed USB device/host
PDF  171 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

RT600 Datasheet(HTML) 115 Page - NXP Semiconductors

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RT600
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors B.V. 2023. All rights reserved.
Product data sheet
Rev. 2.1 — 7 July 2023
115 of 173
NXP Semiconductors
RT600
Dual-core microcontroller with 32-bit Cortex-M33 and Xtensa HiFi4
Audio DSP CPUs
14.11 SPI interfaces (Flexcomm Interfaces 0-7)
The actual SPI bit rate depends on the delays introduced by the external trace, the
external device, system clock (CCLK), and capacitive loading.
Excluding delays introduced by external device and PCB, the maximum supported bit rate
for SPI master mode (transmit/receive) is 25 Mbit/s and the maximum supported bit rate
for SPI slave mode (transmit/receive) is 25 Mbit/s.
[1] Based on simulation; not tested in production.
Table 43. SPI dynamic characteristics[1]
Tamb = 0 C to 85C;VDDIO_x = 1.71 V to 3.6 V; CL = 10 pF balanced loading on all pins; Full Drive Mode on all pins, Input
slew = 1 ns, SLEW setting = standard mode for all pins;. Parameters sampled at the 50 % level of the rising or falling edge.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
SPI master
tDS
data set-up time
5
-
-
ns
tDH
data hold time
0
-
-
ns
tv(Q)
data output valid time
0
-
13
ns
SPI slave
tDS
data set-up time
5
-
-
ns
tDH
data hold time
0
-
-
ns
tv(Q)
data output valid time
0
-
13
ns



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